TO ISVLSI'08 WEBSITE :
This Symposium explores emerging trends and novel ideas and concepts in the area of VLSI. The Symposium covers a range of topics: from VLSI circuits, systems, design and test methods to system level design and system-on-chip issues, to bringing VLSI experience to new areas and technologies. Future design methodologies will also be one of the key topics at the workshop, as well as new CAD tools to support them. For almost two decades, the Symposium has been a unique forum promoting multidisciplinary research and new visionary approaches in the area of VLSI. It brings together leading scientists and researchers from academia and industry, and has established a reputation in inviting well-known international scientists as invited speakers. The 2008 edition will continue to strive to achieve the high standards that participants have come to expect of this Symposium.
Networks on Chip ,
Multi Processor Systems on Chip,
Emerging Trends in VLSI,
Nanoelectronics: Molecular, Biological and Quantum Computing,
VLSI Circuits and Systems ,
System Level Design,
Field-programmable & Reconfigurable Systems,
System on Chip Design,
Application-Specific Low Power VLSI System Design,
System Issues in Complexity,
Low Power, Heat Dissipation, Power Awareness in VLSI Design,
Mixed-Signal Design and Analysis,
Intellectual property creation and sharing,
Test, Design for Test and Verification.
Congratulations to the best paper award !
CMOS Control Enabled Single-Type FET NASIC,
Pritish Narayanan, Michael Leuchtenburg,Teng Wang, Csaba Andras Moritz
This paper has been selected among the 6 best papers reviewed by the Program Committee, but also based on the quality of the presentation and the discussion during the conference.
Compliments also to the 10% best papers nominated for the award:
BTB Access Filtering : A Low Energy and High Performance Design,
Shuai Wang, Jie Hu,Sotirios G. Ziavras
Thermal-aware Placement of Standard Cells and Gate Arrays: Studies and Observations,
Prasun Ghosal, Tuhina Samanta, Hafizur Rahaman, Parthasarathi Dasgupta
Testing skew and logic faults in soc interconnects,
Nestor Hernandez-Cruz, Victor Champac-Vilela
Efficient High-Level Power Estimation for Multi-Standard Wireless Systems,
Ali Ahmadinia, Balal Ahmad, Tughrul Arslan
Temperature-Aware Distributed Run-Time Optimization on MP-SoC using Game Theory,
Diego Puschini, Fabien Clermidy, Pascal Benoit, Gilles Sassatelli, Lionel Torres
Lionel Torres (General Chair, LIRMM/CNRS – Univ. Of Montpellier2) - Philippe Cauvet (NXP) - Pritish Narayanan (Best paper award, University of Massachussetts Ahmerst) - Ian O'Connor (Program Chair - Ecole Centrale Lyon, INL) - Pascal Benoit (Local Chair, LIRMM/CNRS – Univ. Of Montpellier2) - Amar Mukherjee (General Co-Chair, University of Central Florida)