Pierre-Yves PÉNEAU


Bâtiment : Bâtiment 4, Étage 0

Bureau : 2.92

Téléphone : +33 4 67 41 86 65

Fax : +33 4 67 41 85 00

Email : Pierre-yves.Peneau@lirmm.fr

Site internet : http://walafc0.org

Statut : Doctorant

Heterogeneous and adaptive multicore system design for energy-efficient compute nodes

The coming decade will see the generalization of the dematerialized computation paradigm in which computations and data will be ``mobile'' and achieved transparently to users. This will result from the convergence of current numerical technologies, including embedded systems via Internet of Things, high-performance computing (HPC) and cloud computing, towards pervasive large-scale distributed virtualized systems. This upcoming mutation of computing ecosystem will come with major challenges such as security, reliability and energy-efficiency. This Ph.D. thesis focuses on the latter challenge in the context of the CONTINUUM French ANR project intended to explore a design continuum for next generation energy-efficient compute nodes. More precisely, the project aims to a tailored combination of dynamic compilation techniques with state-of-the-art heterogeneous architecture design for providing together energy-efficient execution of targeted compute nodes.

The main research in this thesis concerns the design and development of a novel adaptive heterogeneous multicore system that seamlessly goes from software level to technology level via hardware architecture. The expected breakthroughs concern the combination of state-of-the-art candidate single-ISA heterogeneous architectures such as big.LITTLE, with emerging communication (e.g. on-chip networks) and emerging non memory technologies (magnetic RAM), and suitable software stack (e.g. kernel/OS) so as to enable the power-aware dynamic compilation. The validation of the proposed solution will rely on a cycle-accurate modeling of the system.

Dernière mise à jour le 05/10/2018