Sandip Kundu, Professeur à l'Université du Massachusetts actuellement en visite au LIRMM, présentera deux exposés les mercredi 13 et lundi 18 juillet 2011 :


"Sub-wavelength Lithography: Current Practices, Impact of Process Variation, Defect Modeling" le mercredi 13 Juillet, à 14h00, salle de séminaire du LIRMM.

Abstract: This talk surveys the basics of sub-wavelength optical lithography and resolution enhancement techniques (RET) that make manufacturing of 32nm/28nm transistors possible with current tools. We review control of optical process effects by optical proximity correction (OPC) and phase-shifting masks (PSM), present lithography simulation basics and then focus on process variation and defect modeling.


"Error Resilient Processor Design" le lundi 18 Juillet, à 11h00, salle de séminaire du LIRMM.

Abstract: Relentless advancement in process technology during the last four decades has led to processor designs with progressively higher transistor count and increased clock frequency. However, sustaining this explosive growth of device-count on a chip is predicted to be difficult due to yield and reliability problems. Earlier we had shown through architectural performance evaluation that for floating point and integer division instructions that consume large amount of resources, it does not make sense to add dedicated redundancy. We proposed a shared resource approach for multicore environment. We have seen validation of this concept in a recently announced product where multiple cores share a common FP unit. In this talk we will describe a set of solutions for the general problem of resilient processor design, namely (i) functional error detection schemes to identify failures, (ii) isolation techniques to contain such failures and a (iii) graceful degradation mechanism to degrade performance gracefully with negligible impact on area/power of the processor. Results show that with 5-15% performance degradation a system can degrade gracefully in presence of defects.


Bio: Sandip Kundu is a Professor at the University of Massachusetts at Amherst. Prior to joining academia, he spent several years in industry: first as a Research Staff Member at IBM Research in Yorktown Heights and then at Intel Corporation as a Principal Engineer. He has published more than 170 papers, holds several key patents including ultra-drowsy sleep mode in processors, coauthored a recent book on Design for Manufacturability, and has given more than a dozen tutorials at various conferences. He is a fellow of the IEEE, distinguished visitor of IEEE Computer Society. He has been an Associate Editor of IEEE Transactions on Computers and VLSI systems. He is/was technical program chair of ICCD in 2000, ATS in 2011 and General chair of ICCD in 2001 and VLSI in 2005.


Sandip Kundu
http://www-unix.ecs.umass.edu/~kundu/