Publications and Seminars
e-mail :
dilillo@lirmm.fr
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Journals
Dilillo L., Girard P., Pravossoudovitch S., Virazel A., M.
Bastian
“Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits”
To appear in JETTA Journal of Electronic Testing - Theory
and Applications, 2007, Springer Publisher
pdf version
doc
version
Dilillo L., Rosinger P., Al-Hashimi
B., Girard P.
“Reducing Power Dissipation in SRAM during Test”
JOLPE Journal of Low Power Electronics, 2006,
ASP American Scientific Publisher
pdf version
doc
version
L. Dilillo, P. Girard, S. Pravossoudovitch, A. Virazel et M.
Bastian
“A Novel March Procedure to Test Address Decoder Open Faults in SRAM
Memories”
JEC: Journal of Embedded Computing, IOS Press, 2006.
pdf version
doc
version
DL. Dilillo, P. Girard, S. Pravossoudovitch, A. Virazel, S.
Borri et M. Hage Hassan
“ADOFs and Resistive-ADOFs in SRAM Address
Decoders: Test Conditions and March Solutions”
JETTA Journal of Electronic Testing - Theory and Applications,
2006, Springer Publisher
pdf version
doc
version
Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Borri S.,
Hage-Hassan
“SRAM Address Decoder Dynamic Faults : Analysis and March Test”
JICS'06, Journal of Integrated Circuits and
Systems.
pdf version
doc
version
Dilillo L., Girard P., Pravossoudovitch S.,
Virazel A., Borri S., Hage-Hassan
“Efficient March Test Procedure for Dynamic Read
Destructive Fault Detection in SRAM Memories”
JETTA'05: Journal of Electronic Testing: Theory and
Applications, Vol 21 N.5, 551-561, 2005, Springer
Publisher
pdf version
doc
version
Borri S., Hage-Hassan M.,
Dilillo L., Girard P., Pravossoudovitch S.,
Virazel A.
“Analysis of Dynamic Faults in Embedded-SRAMs:
Implications for Memory Test ”
JETTA'05: Journal of Electronic Testing: Theory and
Applications, Vol 21 N.2, 169-178, 2005, Springer Publishers.
pdf
version
doc
version
Conferences and Workshops
2008
2007
Dilillo L., Al-Hashimi B.
“March
CRF: an Efficient Test
for Complex Read Faults in SRAM memories”
IEEE DDECS:
Workshop on Design & Diagnostics of Electronic Circuits & Systems
Cracow, Poland April 11-13, 2007
2006
Dilillo L., Al-Hashimi B., P.
Rosinger, P. Girard
“Leakage Read Fault in Nanoscale SRAM: Analysis, Test
and Diagnosis”
IEEE IDTW: International Design and Test Workshop,Dubai,
United Arab Emirates, November 19-20, 2006
Dilillo L., Girard P.,
Pravossoudovitch S., Virazel A., Bastian M.
“March Pre: an Efficient Test
for Resistive-Open Defects in the SRAM Pre-charge Circuit”
IEEE DDECS:
Workshop on Design & Diagnostics of Electronic Circuits & Systems
Prague, Czech Republic, April 18-21, 2006
Dilillo L., Rosinger P., Al-Hashimi
B., Girard P.
“Minimizing
Test Power in SRAM through Reduction of Pre-charge Activity”
IEEE DATE'06: Design Automation and Test in Europe Conference,
MESSE Munich, Germany, March 06-10, 2006
pdf version
doc
version
ppt
presentation
2005
Dilillo L., Girard P.,
Pravossoudovitch S., Virazel A., Hage-Hassan M.
“Resistive-Open Defect Injection in SRAM Core-Cell:
Analysis and Comparison between 0.13 µm and 90 nm Technologies”
IEEE DAC'05: 42th Design Automation Conference, Anaheim, California,
June 13-17, 2005
pdf version
doc
version
Dilillo L., Girard P.,
Pravossoudovitch S., Virazel A., Hage-Hassan M.
“Resistive-Open Defect Influence in SRAM Pre-Charge Circuit: Characterization
and Analysis”
IEEE ETS'05, 10th European Test Symposium, Tallinn,
Estonia, May 22-25, 2005
Dilillo
L., Girard P., Pravossoudovitch S., Virazel A., Hage-Hassan M.
“Dynamic Fault in SRAM: Analysis and Test Approaches”
MEDEA+’05:
Invited paper at Medea+ European Conference’05, Paris, France, Mai 23-25, 2005
Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Hage-Hassan M.
“Incidence des défauts résistifs dans les circuits de précharge des Mémoires
SRAM”
JNRDM’05: VIII Journées Nationales du Réseau Doctoral de Microélectronique,
Paris, France, 10-12 May 2005
pdf
version
doc version
ppt
presentation
Dilillo L., Girard P.,
Pravossoudovitch S., Virazel A., Hage-Hassan M.
“Data Retention Fault in SRAM Memories: Analysis and
Detection Procedures”
IEEE VTS'05: 23rd VLSI Test Symposium,
Palm Springs,
CA (USA), May 1- 5, 2005
pdf version
doc
version
Dilillo L., Girard P.,
Pravossoudovitch S., Virazel A., Hage-Hassan M.
"Efficient Test of Dynamic Read Destructive Faults in SRAM Memories"
IEEE LATW'05, 6th Latin American Test Workshop, Salvador, Bahia, Brazil,
March 30th - April 2nd, 2005
pdf version
doc
version
Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Hage-Hassan M.
“Analyse des Fautes Dynamiques dans les Circuits de Précharge des Mémoires
SRAM”
DOCTISS’05: XIII session des Journées des Doctorants de l'Ecole Doctorale I2S,
Montpellier, France, 9 March 2005
pdf version
doc version
ppt
presentation
2004
Dilillo L., Girard P.,
Pravossoudovitch S., Virazel A., Hage-Hassan M.
“Resistive-Open Defects in Embedded-SRAM Core Cells: Analysis and March Test
Solution”
IEEE ATS'04: Asian Test Symposium, Kenting,
Taiwan, 15-17 November 2004.
pdf
version
doc
version
Dilillo L., Girard P.,
Pravossoudovitch S., Virazel A., Borri S., Hage-Hassan M.
“Dynamic Read Destructive Faults in Embedded SRAMs: Analysis and March Test
Solution”
IEEE ETS'04: European Test Symposium, Ajaccio,
France, 24-26 May
2004.
pdf
version
doc
version
ppt
presentation
Dilillo L., Girard P.,
Pravossoudovitch S., Virazel A., Borri S., Hage-Hassan M.
“Test March pour la Détection des Fautes Dynamiques dans les Décodeurs de
Mémoires SRAM”
JNRDM’04: Journées Nationales du Réseau Doctoral de Microélectronique, pp.
495-497, Marseille, France, 4-6 May 2004
pdf
version
doc version
ppt
presentation
Dilillo L., Beroulle V., Dumas N.,
Latorre L., Nouet P.
“An A/D Interface for Resonant Piezoresistive MEMS Sensor”
IEEE ISIE'04: International Symposium on Industrial
Electronics, pp. 83-88, Ajaccio, France, May 4-7, 2004
pdf
version
doc
version
Dilillo L., Girard P.,
Pravossoudovitch S., Virazel A., Borri S.
“March iC-: An Improved Version of March C- for ADOFs Detection”
IEEE VTS'04: 22nd VLSI Test Symposium, Napa Valley,
CA (USA), April 25-29, 2004, pp. 129-134
pdf
version
doc
version
ppt
presentation
Dilillo L., Girard P.,
Pravossoudovitch S., Virazel A., Borri S., Hage-Hassan M.
“March Tests Improvements for Address Decoder Open and Resistive Open Fault
Detection”
IEEE LATW'04: Latin American Test Workshop,
Cartagena (Colombia), March 8-10, 2004, pp. 31-35
pdf
version
doc version
ppt
presentation
2003
Dilillo L., Girard P., Pravossoudovitch S.,
Virazel A., Borri S., Hage-Hassan
“Comparison of Open and Resistive-Open Defect Test Conditions in SRAM Address
Decoder”
IEEE ATS'03: Asian Test Symposium, Xian, China, pp.
250-255, 17-19 November 2003
pdf
version
doc
version
ppt
presentation
Seminars and others
2006
Dilillo L.
“Memory Test with Power and Thermal Constraints”
SETS'06: South European Test Seminar,
Neustift,
Tyrol, Austria, March 27-31, 2006.
ppt
presentation
2005
Dilillo L., Girard P., Pravossoudovitch S.,
Virazel A.
“Dynamic Fault detection in SRAM Pre-Charge Circuits”
SETS'05: South European Test Seminar,
St. Leonhard,
Tyrol, Austria, March 1-5, 2005.
ppt presentation
2004
Dilillo L., Girard P., Pravossoudovitch S.,
Virazel A.
“Test of Dynamic Faults in SRAM Memories”
SETS'04: South European Test Seminar, Morzine, France, March 19-22, 2004.
ppt
presentation
2003
Dilillo L., Girard P., Pravossoudovitch S.,
Virazel A.
“Test of Delay Faults in SRAM Memories”
SETS'03: South European Test Seminar, Pitztal, Austria, February 17-21, 2003.
ppt
presentation
abstract
pdf version
Submitted Papers
Presentations
e-mail :
dilillo@lirmm.fr
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