Publications and Seminars

e-mail    : dilillo@lirmm.fr                                               Back to Home Page

Journals

• Dilillo L., Girard P., Pravossoudovitch S., Virazel A., M. Bastian
  “Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits”
  To appear in JETTA Journal of Electronic Testing - Theory and Applications, 2007, Springer Publisher
             pdf version                                                             doc version

• Dilillo L., Rosinger P., Al-Hashimi B., Girard P.
  “Reducing Power Dissipation in SRAM during Test”
  JOLPE Journal of Low Power Electronics, 2006, ASP American Scientific Publisher
             pdf version                                                             doc version

• L. Dilillo, P. Girard, S. Pravossoudovitch, A. Virazel et M. Bastian
  “A Novel March Procedure to Test Address Decoder Open Faults in SRAM Memories”
  JEC: Journal of Embedded Computing, IOS Press, 2006.
             pdf version                                                             doc version

• DL. Dilillo, P. Girard, S. Pravossoudovitch, A. Virazel, S. Borri et M. Hage Hassan
  “ADOFs and Resistive-ADOFs in SRAM Address Decoders: Test Conditions and March Solutions”
  JETTA Journal of Electronic Testing - Theory and Applications, 2006, Springer Publisher
             pdf version                                                             doc version

• Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Borri S., Hage-Hassan
  “SRAM Address Decoder Dynamic Faults : Analysis and March Test”
  JICS'06, Journal of Integrated Circuits and Systems.
             pdf version                                                             doc version

• Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Borri S., Hage-Hassan
  “Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories”
  JETTA'05: Journal of Electronic Testing: Theory and Applications, Vol 21 N.5, 551-561, 2005, Springer Publisher
             pdf version                                                             doc version 

• Borri S., Hage-Hassan M., Dilillo L., Girard P., Pravossoudovitch S., Virazel A.
  “Analysis of Dynamic Faults in Embedded-SRAMs: Implications for Memory Test ”
   JETTA'05: Journal of Electronic Testing: Theory and Applications, Vol 21 N.2, 169-178, 2005, Springer Publishers.
               pdf version                                                            doc version

Conferences and Workshops

 

2008

• Ney A., Bosio A., Dilillo L., Girard P., Pravossoudovitch S, Virazel A., Bastian M.,
  “A History-based Diagnosis Technique for Static and Dynamic Faults in SRAMs”
  VTS08: International Test Conference, Santa Claea, California USA, October 28-30, 2008
  
  
• Dilillo L. Girard P., Landrault C., Pravossoudovitch S., Virazel A., Bastian M., Gouin V.,
  “Impact of Technology Scaling on Defects and Parameter Deviations in Embedded SRAMs”
  Invited paper at IEEE VTS08: VLSI Test Symposium, San Diego, California USA, 27april-1 May, 2008, p336
  
  
• Ney A., Bosio A., Dilillo L., Girard P., Pravossoudovitch S, Virazel A.
  “A Signature-based Approach for Diagnosis of Dynamic Faults in SRAMs”
  IEEE DTIS: International Conference on Design & Technology of Integrated Systems, Tozeur, Tunisia, March 25-28, 2008

2007

• Dilillo L., Al-Hashimi B.
  “March CRF: an Efficient Test for Complex Read Faults in SRAM memories”
  IEEE DDECS: Workshop on Design & Diagnostics of Electronic Circuits & Systems
  Cracow, Poland April 11-13, 2007

     pdf version                                                          doc version

  2006

• Dilillo L., Al-Hashimi B., P. Rosinger, P. Girard
  “Leakage Read Fault in Nanoscale SRAM: Analysis, Test and Diagnosis”
  IEEE IDTW: International Design and Test Workshop,Dubai, United Arab Emirates, November 19-20, 2006

     pdf version                                                          doc version

• Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Bastian M.
  “March Pre: an Efficient Test for Resistive-Open Defects in the SRAM Pre-charge Circuit”
  IEEE DDECS: Workshop on Design & Diagnostics of Electronic Circuits & Systems
  Prague, Czech Republic, April 18-21, 2006

              pdf version                                                          doc version

• Dilillo L., Rosinger P., Al-Hashimi B., Girard P.
  “Minimizing Test Power in SRAM through Reduction of Pre-charge Activity”
  IEEE DATE'06: Design Automation and Test in Europe Conference, MESSE Munich, Germany, March 06-10, 2006
                pdf version                                                          doc version ppt presentation

2005

• Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Hage-Hassan M.
  “Resistive-Open Defect Injection in SRAM Core-Cell: Analysis and Comparison between 0.13 µm and 90 nm Technologies”
  IEEE DAC'05: 42th Design Automation Conference, Anaheim, California, June 13-17, 2005
                pdf version                                                          doc version

• Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Hage-Hassan M.
  “Resistive-Open Defect Influence in SRAM Pre-Charge Circuit: Characterization and Analysis”
  IEEE ETS'05, 10th European Test Symposium, Tallinn, Estonia, May 22-25, 2005

                pdf version                                                          doc version

• Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Hage-Hassan M.
  “Dynamic Fault in SRAM: Analysis and Test Approaches”
  MEDEA+’05: Invited paper at Medea+ European Conference’05, Paris, France, Mai 23-25, 2005

• Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Hage-Hassan M.
  “Incidence des défauts résistifs dans les circuits de précharge des Mémoires SRAM”
  JNRDM’05: VIII Journées Nationales du Réseau Doctoral de Microélectronique, Paris, France, 10-12 May 2005
               pdf version                                                           doc version  ppt presentation

• Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Hage-Hassan M.
  “Data Retention Fault in SRAM Memories: Analysis and Detection Procedures”
  IEEE VTS'05: 23rd VLSI Test Symposium, Palm Springs, CA (USA), May 1- 5, 2005
             pdf version                                                             doc version

• Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Hage-Hassan M.
  "Efficient Test of Dynamic Read Destructive Faults in SRAM Memories"
  IEEE LATW'05, 6th Latin American Test Workshop, Salvador, Bahia, Brazil, March 30th - April 2nd, 2005
              pdf version                                                           doc version

• Dilillo L., Girard P., Pravossoudovitch S., Virazel A., Hage-Hassan M.
  “Analyse des Fautes Dynamiques dans les Circuits de Précharge des Mémoires SRAM”
  DOCTISS’05: XIII session des Journées des Doctorants de l'Ecole Doctorale I2S, Montpellier, France, 9 March 2005
               pdf version                                                           doc version  ppt presentation