Research Topics

1999-2006 (Politecnico di Torino): I worked in the area of digital systems dependability for safety-critical applications. The research activity mainly focused on the definition of new methodologies and the implementation of tools able to improve the development of highly dependable systems, at different levels: for basic digital components, for systems on chip, up to microprocessor-based systems.
From 2006 (LIRMM): Design and Test of Secure Circuits. Reliability of Digital Systems

Scientific Responsabilities:

2010/13Vice-Chair of the European "Test Technology Technical Council" (ETTTC) of IEEE Computer Society
From 2011Vice-Chair of the Technical Activity on "HARDWARE SECURITY AND TRUST" of IEEE Computer Society TTTC
From 2011Co-Chair of the Technical Activity on "Embedded System Security" of GDR (Groupe de Recherche) SoC-SiP of CNRS
From 2004:Web Master of the "Test Technology Technical Council" (TTTC) of IEEE Computer Society
2001/04Associated Web Master of the "Test Technology Technical Council" (TTTC) of IEEE Computer Society

Program Committee member of the following conferences:

2012IEEE "Latin American Test Workshop" (LATW 2012), Ecuador
IEEE "European Test Symposium" (ETS 2012), Annecy (France)
IEEE "VLSI Test Symposium" (VTS 2012), Hawaii (USA)
"Design of Circuits and Integrated Systems Conference" (DCIS 2012), France
2011IEEE "Latin American Test Workshop" (LATW 2011), Brasil
IEEE "Design, Automation and Testing in Europe" (DATE 2011), Grenoble (France)
IEEE "European Test Symposium" (ETS 2011), Trondheim (Norway)
IEEE "VLSI Test Symposium" (VTS 2011), Dana Point (California, USA)
IEEE "International On-Line Testing Symposium" (IOLTS 2011), Athens (Greece)
"Design of Circuits and Integrated Systems Conference" (DCIS 2011), Portugal
2010IEEE "Latin American Test Workshop" (LATW 2010), Uruguay
IEEE "Design, Automation and Testing in Europe" (DATE 2010), Dresden (Germany)
IEEE "European Test Symposium" (ETS 2010), Prague (Czech Republic)
IEEE "VLSI Test Symposium" (VTS 2010), Santa Cruz (California, USA)
IEEE "International On-Line Testing Symposium" (IOLTS 2010), Corfu (Greece)
"Design of Circuits and Integrated Systems Conference" (DCIS 2010), Spain
IEEE "International Conference on Automation, Quality & Testing, Robotics" (AQTR 2010), Cluj-Napoca (Romania), Topic Chair
2009IEEE "Latin American Test Workshop" (LATW 2009), Brasil
IEEE "Design, Automation and Testing in Europe" (DATE 2009), Nice (France)
"Design of Circuits and Integrated Systems Conference" (DCIS 2009), Spain
"EUROMICRO Conference on Digital System Design" (DSD'2009), Patras (Greece)
IEEE "Workshop on Dependable and Secure Nanocomputing" (wDSN 2009), Lisbon (Portugal)
2008IEEE "International Conference on Automation, Quality & Testing, Robotics" (AQTR 2008), Cluj-Napoca (Romania), Topic Chair
"Design of Circuits and Integrated Systems Conference" (DCIS 2008), Grenoble (France)
IEEE "Design, Automation and Testing in Europe" (DATE 2008), Munich (Germany)
2006IEEE "International Conference on Automation, Quality & Testing, Robotics" (AQTR 2006), Cluj-Napoca (Romania)

Organizing Committee member of the following conferences/workshops:

2012Publicity Chair of "VLSI Test Symposium 2012" (VTS'12), California, USA
Publication Chair "European Test Symposium 2012" (ETS'12), Annecy (France)
Web Chair "Design of Circuits and Integrated Systems Conference" (DCIS 2012), Avignon (France)
2011Publicity Chair of "VLSI Test Symposium 2011" (VTS'11), California, USA
2010Publicity Chair of "VLSI Test Symposium 2010" (VTS'10), California, USA
2009Publicity and Web chair of "VLSI Test Symposium 2009" (VTS'09), California, USA
2008Publicity and Web chair of "Board Test Workshop 2008" (BTW'08), Fort Collins (Colorado, USA)
Publicity and Web chair of "VLSI Test Symposium 2008" (VTS'08), San Diego (Californie, USA)
2007General Chair of the "South European Test Seminar 2007" (SETS'07), Italy
Publicity and Web Chair of the "VLSI Test Symposium 2007" (VTS'07), Berkeley (California, USA)
Publicity and Web Chair of the "European Board Test Workshop 2007" (EBTW'07), Fort Collins (Colorado, USA)
2006Publicity and Web Chair of the "VLSI Test Symposium 2006" (VTS'06), Berkeley (California, USA)
2005Publicity and Web Chair of the "Board Test Workshop 2005" (BTW'05), Fort Collins (Colorado, USA)
2004Publicity and Web Chair of the "Board Test Workshop 2004" (BTW'04), Fort Collins (Colorado, USA)
2003Publicity and Web Chair of the "Board Test Workshop 2003" (BTW'03), Charlotte (North Carolina, USA)
2002Publicity and Web Chair of the "Board Test Workshop 2002" (BTW'02), Baltimore (Maryland, USA)

Reviewer for the following conferences/journals:

2011IEEE Transactions on Computers
IEEE Transactions on Circuits and Systems
IEEE Transactions on VLSI
2010IEEE Transactions on Computers
IET "Computers & Digital Techniques"
IEEE "International Test Conference" (ITC'10)
2009IEEE Transactions on Computers
IEEE "International VLSI Test Symposium" (VTS'09)
IEEE "International Test Conference" (ITC'09)
IEEE "International Midwest Symposium on Circuits and Systems" (MWSCAS 2009)
2008IEEE "Design, Automation and Testing in Europe" (DATE'08)
International Journal of Communications, Network and System Sciences
IEEE Transactions on Computers
IEEE Design & Test of Computer
"Iranian Journal of Science and Technology"
IEEE International Conference on Computer Aided Design (ICCAD'08)
IEEE International Conference on Computer Design (ICCD'08)
IEEE "International Conference on Automation, Quality & Testing, Robotics" (AQTR 2008)
2007IEEE "International Test Conference" (ITC'07)
"Journal of System Architecture" (Elsevier)
2006"Journal of Engineering Applications of Artificial Intelligence" (Elsevier)
IEEE "International VLSI Test Symposium" (VTS'06)
IEEE "International Test Conference" (ITC'06)
IEEE "International Conference on Automation, Quality & Testing, Robotics" (AQTR 2006)
2005IEEE "International Test Conference" (ITC'05)
"European Workshop on Evolutionary Computation in Hardware Optimisation" (EvoHot'05)
2004IEEE "International Test Conference" (ITC'04)
2002IEEE "International Test Conference" (ITC'02)

Awards and Acknowledgments:

2011"IEEE Computer Society Golden Core Member"
2010"Meritorious Service Award - in recognition of more than 8 years of significant services for TTTC Electronic Media"
2007"Certificate of Appreciation from IEEE Computer Society for serving as TTTC Webmaster in 2006/2007"
2005"Certificate of Appreciation from IEEE Computer Society for serving as TTTC Webmaster in 2004/2005"

Research Projects

2011/14Participation to the CALISSON2 project (CAractérisation, modéLIsation et Spécifications) which aims to unite research efforts in order to improve the security of integrated circuits for the components market which provides security functions. The project is funded by the General Directorate for Competitiveness, Industry and Services (DGCIS) and it is sponsored by the "Secure Communications Solutions" competitiveness cluster.
2010/122010-2013: Participation to the Work Packages 2 and 6 (related to test and security) of the project ProSecure, that targets the design and development of an embedded secure microprocessor. This project is funded by the French Languedoc-Roussillon region.
2007/09Participation to the CALISSON project (CAractérisation, modéLIsation et Spécifications) to enhance the security of electronic devices by developing new design flows in order to reduce the overall design cost and to increase the Time to Market. The project is funded by the General Directorate for Competitiveness, Industry and Services (DGCIS) and it is sponsored by the "Secure Communications Solutions" competitiveness cluster.
2004/06Participation to the framework of the Protocol for scientific and technological collaboration between the Republic of Italy and Slovak Republic
2001/03Leader of the Work Package 2 - Task 1 ("BISR for SRAM memories") of the project called "TestDOC: Quality and Reliability of System-on-chip" funded by the Istituto Superiore M. Boella (www.testgroup.polito.it/tdoc)
2001/03Participation to the GRAAL project. The goal of this project was the implementation of a tool targeting the automatic generation of highly dependable SRAMs. It has been developed under the project S167P founded by the Italian Ministry of the University and Technological and Scientific Research
2001/02Participation to the framework of the Protocol for scientific and technological collaboration between the Republic of Italy and Spain
2000/02Participation to the framework of the "Giovani Ricercatori" project at Politecnico di Torino. The goal of the project was the development of new methodologies to increase the dependability of space applications using software techniques