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since
2005 : CNRS
Research Director in the Microelectronics Department of LIRMM.
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1994-2005
: CNRS
Researcher in the Microelectronics Department of LIRMM.
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1992-1994
: Associate Professor, EERIE (Engineering School in Electronics and
Computer Science),
Nīmes, France.
Patrick
GIRARD received a M.S. degree in Electrical Engineering and a Ph.D.
degree in Microelectronics from the University of Montpellier, France,
in 1988 and 1992 respectively. He is currently Research Director at
CNRS (French National Center for Scientific Research), and Head of the
Microelectronics Department of the LIRMM (Laboratory of Informatics,
Robotics and Microelectronics of Montpellier - France). His research
interests include all aspects of digital testing and memory testing,
with emphasis on critical constraints such as timing and power.
Reliability and fault tolerance, as well as design and test of 3D ICs
are also part of his new research activities. Patrick Girard is Technical Activities Chair of the Test
Technology Technical Council (TTTC) of the IEEE Computer Society.
From 2006 to 2010, he was Vice-Chair of the European TTTC (ETTTC) of the IEEE Computer Society. He
has served on numerous conference committees including ACM/IEEE Design
Automation Conference (DAC), ACM/IEEE Design Automation and Test in
Europe (DATE), IEEE International Test Conference (ITC), IEEE
International Conference on Computer Design (ICCD), IEEE VLSI Test
Symposium (VTS), IEEE European Test Symposium (ETS), IEEE Asian Test
Symposium (ATS), and ACM/IEEE International Symposium on Low Power
Electronic Design (ISLPED). Patrick Girard is the founder and
Editor-in-Chief of the ASP Journal of
Low Power Electronics (JOLPE). He is an Associate Editor of the IEEE
Transactions on VLSI Systems and the Journal of Electronic Testing –
Theory and Applications (JETTA - Springer). From 2005 to 2009, he was
an Associate Editor of the IEEE Transactions on Computers. He is a
co-editor of the book “Power-Aware Testing and Test Strategies for Low
Power Devices” and a co-author of the book “Advanced
Test Methods for SRAMs – Effective Solutions for Dynamic Fault
Detection in Nanoscale Technologies”, both published by Springer in
2009. Patrick Girard has been involved in several European research
projects
(ESPRIT III ATSEC, EUREKA MEDEA, MEDEA+ ASSOCIATE, IST MARLOW, MEDEA+
NanoTEST, CATRENE TOETS, ENIAC ELESIS) and has managed industrial
research contracts
with major companies like Infineon Technologies, Intel Mobile Communications, Atmel,
ST-Ericsson, STMicroelectronics, etc. He has supervised 28 PhD
dissertations and has published 6 books or book chapters, 38 journal
papers, and more than 150 conference and symposium papers on these
fields. Patrick Girard is a Golden Core Member of the IEEE Computer
Society.
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