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2003 - "Habilitation à Diriger des Recherches",
University of Montpellier, France.
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1992 - Ph.D. in Microelectronics, University of
Montpellier, France.
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1988 - "Diplôme d'Etudes Approfondies" (Master of Sciences) in
Microelectronics, University of Montpellier, France.
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1987 -
"Maîtrise" in Electrical Engineering, University of
Montpellier, France.
Patrick GIRARD received a M.S. degree in Electrical Engineering and a Ph.D. degree in Microelectronics from the University of Montpellier, France, in 1988 and 1992 respectively. He is currently Research Director at CNRS (French National Center for Scientific Research), and works in the Microelectronics Department of the LIRMM (Laboratory of Informatics, Robotics and Microelectronics of Montpellier - France). Patrick Girard is the Vice-Chair of the European Test Technology Technical Council (ETTTC) of the IEEE Computer Society. He is founder and Editor-in-Chief of the ASP Journal of Low Power Electronics (JOLPE). He is an Associate Editor of the IEEE Transactions on VLSI Systems and the Journal of Electronic Testing – Theory and Applications (JETTA - Springer). From 2005 to 2009, he was an Associate Editor of the IEEE Transactions on Computers. He has served as technical program committee member of the ACM/IEEE Design Automation Conference (DAC), ACM/IEEE Design Automation and Test in Europe (DATE), IEEE International Test Conference (ITC), IEEE International Conference on Computer Design (ICCD), IEEE International Conference on Design & Test of Integrated Systems (DTIS), IFIP International Conference on VLSI-SOC, IEEE / IARIA International Conference on Advances in System Testing and Validation Lifecycle (VALID), IEEE International Conference on Signals, Circuits & Systems (SCS), IEEE VLSI Test Symposium (VTS), IEEE European Test Symposium (ETS), IEEE International On-Line Testing Symposium (IOLTS), IEEE Asian Test Symposium (ATS), ACM/IEEE International Symposium on Low Power Electronic Design (ISLPED), IEEE International Symposium on Electronic Design, Test & Applications (DELTA), IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS) and IEEE International Workshop on Defect and Data Driven Testing (D3T). He has served as Test Track Chair for DAC 2007, ICCD 2008, and DATE from 2007 to 2010. He has also served as Program Chair for DELTA 2006, DTIS 2006, DDECS 2007 and ETS 2008. Patrick Girard has been involved in several European research projects (ESPRIT III ATSEC, EUREKA MEDEA, MEDEA+ ASSOCIATE, IST MARLOW, MEDEA+ NanoTEST, CATRENE TOETS) and has managed industrial research contracts with major companies like Infineon Technologies, Atmel, STMicroelectronics, etc. His research interests include the various aspects of digital testing and memory testing, with special emphasis on DfT, BIST, diagnosis, delay testing, and power-aware testing. He has supervised 21 PhD dissertations and has published 6 books or book chapters, 34 journal papers, and more than 110 conference and symposium papers on these fields. He received the Best Paper Award at ETS 2004 and at DDECS 2005.
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