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Contact : Lionel TORRES (Lionel.Torres@lirmm.fr)  
Les dernières Publications

Revues Internationales :

[1] Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet, Eduardo Wanderley, Russell Tessier and Wayne Burleson, A Security Approach for Off-Chip Memory in Embedded Microprocessor Systems, à paraître dans in Journal of Microprocessors and Microsystems.

[2] R. Elbaz, D.Champagne, C. Gebotys, R. Lee, N. Potlapally and L. Torres "Hardware Mechanisms for Memory Authentication: A Survey of Existing Techniques and Engines”
(accepté, à paraître dans Springer TCS, Transactions on Computational Science)

Conférences Internationales majeures :

[2] Sylvain Guilley, Laurent Sauvage, Jean‑Luc Danger et Philippe Hoogvorst, (septembre 2008), Area Optimization of Cryptographic Co‑Processors Implemented in Dual‑Rail with Precharge Positive Logic, "FPL (18th IEEE International Conference on Field‑Programmable Logic and Applications)", Heidelberg, Germany, pp. 161‑166.

[3] V. Fischer, F. Bernard, N. Bochard, M. Varchola: Enhancing Security of Ring Oscillator-based RNG implemented in FPGA. In: Proceedings of Field Programmable Logic and Applications- FPL, September 2008, Heidelberg, Germany, pp. 245-250.

[4] Benoit Badrignans, Reouven Elbaz, Lionel Torres Secure FPGA Configuration Architecture Preventing System Downgrade, "FPL (18th IEEE International Conference on Field‑Programmable Logic and Applications)", Heidelberg, Germany, pp. 161‑166.

[5] Reouven Elbaz, David Champagne, Ruby B. Lee, Lionel Torres,Gilles Sassatelli, and Pierre Guillemin  : TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks, Conférence CHES 2007 Cryptographic Hardware and Embedded Systems, Autriche, Septembre 2007.

[6] Victor Lomne, Philippe Maurine, Rafael Soares, Lionel Torres, Ney Calazans, Michel Robert : 'Evaluation on FPGA of Triple Rail Logic robustness against DPA and DEMA, accepté à la conference Design Automation and Test in Europe, Mars 2009.

Brevet :

Un dépôt de brevet national, LABSTICC, G. Gogniat, P. Bomel, sur la reconfiguration de circuits logiques programmable FPGA via un réseau standard à l’aide d’un protocole spécifique.

Conférences invitées (5 principales) :

Trusted Computing - A New Challenge for Embedded Systems, Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet, Alain Pegatoquet, Papier Invité, ICECS 2006, Nice – France, December 10-13, 2006

Jean-Luc Danger, Sylvain Guilley Secure generation of random numbers, Philippe Hoogvorst, ""; CRYPTARCHI'07 Montpellier, Juin 2007

Viktor Fischer, Alain Aubert, Nathalie Bochard, Implementation of True Random Number Generators in (Reconfigurable) Logic Devices – State of the Art, Papier Invité, CryptArchi 2007, Montpellier – France, June 19-22, 2007

B. Badrignans, L. Torres, X. Facelina Reconfigurable cryptographic processor on FPGA, , Papier Invité, CryptArchi 2007, Montpellier – France, June 19-22, 2007






 

 
Date de dernière mise à jour : 12/02/2009