{"id":2425,"date":"2022-12-15T11:47:00","date_gmt":"2022-12-15T10:47:00","guid":{"rendered":"https:\/\/projet.lirmm.fr\/adac\/?p=2425"},"modified":"2023-06-15T12:42:52","modified_gmt":"2023-06-15T10:42:52","slug":"theo-soriano-design-space-exploration-of-microcontroller-memory-architectures-for-intermittent-computing-at-the-edge","status":"publish","type":"post","link":"https:\/\/www.lirmm.fr\/adac\/2022\/12\/15\/theo-soriano-design-space-exploration-of-microcontroller-memory-architectures-for-intermittent-computing-at-the-edge\/","title":{"rendered":"PhD defense: Theo Soriano &#8211; Design Space Exploration of Microcontroller Memory Architectures for Intermittent Computing at the Edge"},"content":{"rendered":"\n<div class=\"wp-block-uagb-image uagb-block-183f67c1 wp-block-uagb-image--layout-default wp-block-uagb-image--effect-static wp-block-uagb-image--align-none\"><figure class=\"wp-block-uagb-image__figure\"><img loading=\"lazy\" decoding=\"async\" src=\"https:\/\/www.lirmm.fr\/adac\/wp-content\/uploads\/sites\/37\/2023\/06\/defense_theo_1180x332-1024x288.jpg\" alt=\"\" class=\"uag-image-3106\" width=\"1024\" height=\"288\" title=\"\" loading=\"lazy\" \/><\/figure><\/div>\n\n\n\n<div style=\"height:40px\" aria-hidden=\"true\" class=\"wp-block-spacer\"><\/div>\n\n\n\n<p class=\"wp-block-paragraph\"><strong>Defense Date:<\/strong> December 15, 2022<\/p>\n\n\n\n<p class=\"wp-block-paragraph\"><strong>Jury members:<\/strong> Lorena Anghel, Pascal Benoit, Francky Catthoor, Gregory Di Pendina, Laurent Latorre, David Novo, and Jean-Michel Portal<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">The thesis aims to optimize energy efficiency in wireless sensor nodes by building an energy model, proposing an FPGA-based prototype, and introducing an MCU memory exploration tool. The results demonstrate the potential for reducing power consumption and increasing energy efficiency in smart sensor nodes.<\/p>\n\n\n\n<div style=\"height:40px\" aria-hidden=\"true\" class=\"wp-block-spacer\"><\/div>\n","protected":false},"excerpt":{"rendered":"<p>Theo Soriano &#8211; Design Space Exploration of Microcontroller Memory Architectures for Intermittent Computing at the Edge<\/p>\n","protected":false},"author":45,"featured_media":3026,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_eb_attr":"","_crdt_document":"","footnotes":""},"categories":[33],"tags":[],"class_list":["post-2425","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news"],"_links":{"self":[{"href":"https:\/\/www.lirmm.fr\/adac\/wp-json\/wp\/v2\/posts\/2425","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.lirmm.fr\/adac\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.lirmm.fr\/adac\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.lirmm.fr\/adac\/wp-json\/wp\/v2\/users\/45"}],"replies":[{"embeddable":true,"href":"https:\/\/www.lirmm.fr\/adac\/wp-json\/wp\/v2\/comments?post=2425"}],"version-history":[{"count":5,"href":"https:\/\/www.lirmm.fr\/adac\/wp-json\/wp\/v2\/posts\/2425\/revisions"}],"predecessor-version":[{"id":3135,"href":"https:\/\/www.lirmm.fr\/adac\/wp-json\/wp\/v2\/posts\/2425\/revisions\/3135"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.lirmm.fr\/adac\/wp-json\/wp\/v2\/media\/3026"}],"wp:attachment":[{"href":"https:\/\/www.lirmm.fr\/adac\/wp-json\/wp\/v2\/media?parent=2425"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.lirmm.fr\/adac\/wp-json\/wp\/v2\/categories?post=2425"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.lirmm.fr\/adac\/wp-json\/wp\/v2\/tags?post=2425"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}