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List of updated publications can be found on HAL

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  1. Siyuan Niu, Adrien Suau, Gabriel Staffelbach, Aida Todri-Sanial. A Hardware-aware Heuristic for the Qubit Mapping Problem in the NISQ Era. 6th International Conference for Young Quantum Information Scientists (YQIS 6 or YQIS 2021), Apr 2021, Online, United States. ⟨lirmm-03197069⟩ 
  2. Stefania Carapezzi, Gabriele Boschetto, Corentin Delacour, Madeleine Abernot, Thierry Gil, Aida Todri-Sanial, EU H2020 NEURONN: 2D Oscillatory Neural Networks For Energy Efficient Neuromorphic Computing. 15ème Colloque National du GDR SOC2, Jun 2021, Rennes, France. ⟨lirmm-03270397⟩ 
  3. Siyuan Niu, Adrien Suau, Gabriel Staffelbach, Aida Todri-Sanial. A Hardware-aware Heuristic for the Qubit Mapping Problem in the NISQ Era. 15ème Colloque National du GDR SOC2, Jun 2021, Rennes, France. ⟨lirmm-03275340⟩ 
  4. A. Todri-Sanial, “Design and Technology-level Optimization Challenges for Carbon Nanotube Circuits”, EDA Workshop, Xidian University, Jan. 2020. 
  5. A. Todri-Sanial, “Heterogeneous Integration Roadmap (HIR): Co-Design Challenges and Perspectives”, Heterogeneous Integration Roadmap Workshop, IEEE IEDM, Dec. 2019. 
  6. A. Todri-Sanial, “Quantum Computing – Collaborative Initiative between University of Montpellier and IBM Montpellier “, IBM Quantum Summit, Zurich, CH, October 2019. ⟨lirmm-02387996⟩ 
  7. A. S. Dahiya, B. Charlot, M. Dhifallah, Th. Gil, N. Azemard, et al., A. Todri-Sanial, “SmartVista: Smart Autonomous Multi Modal Sensors for Vital Signs Monitoring”. Workshop on ‘Smart Bioelectronic and Wearable Systems’, Oct 2019, Brussels, Belgium. 2019. ⟨lirmm-02387949⟩ 
  8. M. Dhifallah, J. Liang, Th. Gil, N. Azemard, B. Charlot, A. Giani, A. Lacampagne, A. Todri-Sanial, “Piezoelectric Sensors Based on 1D/2D Materials for Smart Health Monitorin IoT,” Colloque GDR SoC-SiP 2019. 
  9. G. Pillonnet, Ph. Basset, A. Todri-Sanial, “Ultimate Power Dissipation for Computing based on Energy-Reversible and Capacitive Electromechanical Devices”, Colloque GDR SoC-SiP 2019. 
  10. J. Liang, R. Ramos, J. Dijon, H. Okuno, D. Kalita, D. Renaud, J. Lee, V. Georgiev, S. Berrada, T. Sadi, A. Asenov, B. Uhlig, K. Lilienthal, A. Dhavamani, F. Koenemann, B. Gotsmann, G. Goncalves, B. Chen, K. Teo, R. Pandey and A. Todri-Sanial, “Progress on Pt-Salt Doped Carbon Nanotubes for Local Interconnects”, GDR SoC-SiP 2018.
  11. N. Jeanniot, G. Pillonnet, A. Todri-Sanial, “4-Phase Resonant Power-Clock Supply for Adiabatic Logic,” GDR Soc-SiP 2017.
  12. N. Jeanniot, A. Todri-Sanial, P. Nouet, G. Pillonnet, H. Fanet, “Impact of Power-Clock Network on Adiabatic Logic,” in Colloque GDR SoC-SiP 2016.
  13. L. Zhang, Y. Cheng, W. Kang, Y. Zhang, W. Zhao, L. Torres, A. Todri-Sanial, “Investigation of Reliability and Performance for STT-MRAM under PVT Variations,” in Colloque GDR SoC-SiP 2016.
  14. N. Jeanniot, A. Todri-Sanial, P. Nouet, G. Pillonnet, H. Fanet, “Impact of Power-Clock Network on Adiabatic Logic,” in IEEE PwrSoc Workshop, 2016.
  15. A. Todri-Sanial, “On Carbon Nanotubes as VLSI Interconnects,” CMOS Emerging Technology Research Symposium, 2014.
  16. A. Todri-Sanial, “Carbon Nanotubes for Energy Efficient Integrated Circuits,” CNRS Colloque Physique Theorique et ses Interfaces, 2014.
  17. J. Azevedo, A. Virazel, A. Bosio, L. Dilillo, P. Girard, A. Todri,“Performance Evaluation of Capacitive Defects on TAS-MRAM,” Colloque du GDR SoC-SiP, 2013.
  18. G. Tsiligiannis, L. Dilillo, A, Bosio, P. Girard, S. Pravossoudovitch, A. Todri, A. Virazel, “Investigating Multiple-Cell-Upsets on a 90nm SRAM,” Colloque GDR SoC-SiP, 2013.
  19. Zh. Sun, A. Bosio, L. Dilillo, P. Girard, A. Todri, A. Virazel, “Fault-Effect Propagation Based Intra-Cell Scan Chain Diagnosis,” Colloque GDR SoC-SiP, 2013.
  20. J. Azevedo, A. Virazel, A. Bosio, L. Dilillo, P. Girard, A. Todri, G. Prenat, J. Alvarez-Herault, K. Mackay, “Impact of Resistive-Open Defects in the Word-Line Selection of TAS-MRAMs,” Colloque du GDR Soc-Sip, 2012.
  21. C. Metzler, A. Todri, A. Bosio, L. Dilillo, P. Girard, A. Virazel, “Through Silicon Via Resistive-Open Defect,” Colloque du GDR Soc-Sip, 2012.
  22. G. Tsiligiannis, L. Dilillo, A. Bosio, P. Girard, A. Todri, A. Virazel, “Dynamic Mode Testing of SRAMs under Neutrons,” Colloque du GDR Soc-Sip, 2012.
  23. Zh. Sun, A. Bosio, L. Dilillo, P. Girard, A. Todri, A. Virazel, E. Auvray, “Effective Defect Localization Through an Effect-Cause based Intra-Cell Diagnosis,” Colloque du GDR Soc-Sip, 2012.
  24. M. Valka, A. Bosio, L. Dilillo, A. Todri, A. Virazel, P. Girard, P. Debaud, “Adaptive Voltage Scaling Via Effective On-Chip Timing Uncertainty Measurement,” Colloque du GDR Soc-Sip, 2012.
  25. A. Todri-Sanial,”Voltage Droop and Thermal Constraints Driven Optimization of 3D Power Delivery Networks,” Workshop Design for 3D (D43D), 2012.
  26. M. Imhof, H-J Wunderlich, D. A. Tran, A. Virazel, A. Bosio, L. Dilillo, P. Girard, A. Todri,“Ein Pseudo-Dynamischer Komparator zur Fehlererkennung in fehlertoleranten Architekturen”, Workshop: Testmethoden und Zuverlaessigkeit von Schaltungen und Systemen, 2012.
  27. B. Zordan, A. Bosio, L. Dilillo, P. Girard, S. Pravossoudovitch, A. Todri, A. Virazel, N. Bedereddine, “Failure Analysis and Test Solutions for Low-Power SRAMs,” Emerging Technologies and Green Soc-Sip, 2011.
  28. M. De Carvalho, A. Bosio, L. Dilillo, P. Girard, A. Todri, A. Virazel, “A Functional Power Evaluation Flow for Defining Test Power Limits during At-Speed Delay Testing,” Emerging Technologies and Green Soc-Sip, 2011.
  29. A. Todri, L. Perera, R. Rivera, and S. Kwan, “Reliability and Performance Studies of DC-DC Conversion Powering Scheme for the CMS Pixel Tracker at SLHC,” Topical Workshop on Electronics for Particle Physics, 2010.
  30. A. Todri, L. Perera, R. Rivera, and S. Kwan, “Reliability and Performance Studies of DC-DC Conversion Powering Scheme for the CMS Pixel Tracker at SLHC,” Fermilab Workshop on Detector RD, 2010.
  31. A. Todri, M. Marek-Sadowska, “Electromigration Study of Power Gated Grids,” Proceedings in IEEE International Symposium on Low Power Electronics and Design, 2009.
  32. A. Todri, M. Marek-Sadowska, F. Maire, Ch. Matheron, “Decoupling Capacitance Allocation for Power Supply Noise Reduction,” Technology and Talent for the 21st Century, TECHCON 2009
  33. A. Todri, Sh-C. Chang, M. Marek-Sadowska, “Electromigration and Voltage Drop Aware Power Grid Optimization for Power-Gated ICs,” Proceedings in IEEE International Symposium on Low Power Electronics and Design 2007.