2017

Hardware Support for Physical Security

Par Tisserand Arnaud (CNRS, Lab-STICC) le 2017-11-13

Embedded systems have to increasingly support cryptographic primitives such as authentication and cyphering. Speed was considered for many years the main design target. But today, energy and security against physical attacks are essential constraints in many embedded applications. Software implementations are flexible but they can fairly easily leak secret data. This talk will show how hardware acceleration can assist programmers in designing more secure cryptosystems. It will introduce general principles and provide some examples in physical attacks and hardware protections or countermeasures using simple applications in asymmetric cryptography.

Par Jenn Eric (IRT Saint Exupéry et Thales Avionics, Toulouse) le 2017-09-27

Dans cet exposé, nous donnerons un aperçu de certaines des questions que nous avons abordées et aborderons dans les projets réalisés au sein de l'IRT Saint Exupéry de Toulouse, dans un contexte multidomaines, automobile et spatial et notamment le projet actuel CAPHCA. Il y sera question de modélisation système, de modèles d'architecture matérielle et logicielle, de codesign matériel et logiciel, de SoCs et de méthodes formelles.

Par Ho Minh Quan (Kalray and University of Grenoble Alpes) le 2017-09-14

Abstract: In the first part of this talk, we will present the Kalray MPPA manycore architecture and resume experiences on writing and optimizing the general matrix-matrix multiplication (GEMM) operation on the processor. The second part shows the importance of having standard optimized libraries on computing architectures and the difficulties of doing such procedure. We then talk about BLIS as a nice way to instantiate BLAS for any platform, and step-by-step the porting and optimization approaches of BLIS on MPPA, as well as how to re-apply these on other platforms.

Par Detrey Jérémie (LORIA, Nancy) le 2017-06-28

Séminaire ECO/Escape, LIRMM.

The Kalray MPPA-256 is a recent low-power chip which embeds 256 32-bit cores. As such, it can be used as an efficient co-processor for accelerating computations, bridging the gap between usual CPUs and the more throughput-oriented GPUs, all the while consuming far less power.
In this talk, we will present a fast and energy-efficient implementation of the Elliptic Curve Method (ECM, an algorithm for factoring integers) on this platform. After a brief presentation of the ECM and of its important role in cryptanalysis, especially in the context of factoring RSA keys, we will glance at some of the key architectural features of the MPPA-256. We will then present an optimized library for multiprecision modular arithmetic, on top of which the ECM implementation was built, before concluding with a few benchmarks and comparisons with the state of the art.
This is a joint work with Masahiro Ishii, Pierrick Gaudry, Atsuo Inomata, and Kazutoshi Fujikawa.