ANR JCJC F3CAS

Rethinking FPGA-Accelerated Computer Architecture Simulation for Data Storage Exploration

Modern high-performance mobile computing architectures spend more than 60% of the energy on data storage and movement. However, fundamental limitations in existing evaluation tools hinder innovation in memory systems.

The F3CAS project proposes a new paradigm to build user- Friendly, Fast and Faithful Computer-system Architecture Simulations (F3CAS) tailored to the exploration of new memory architectures.

The main goal of this project is to uniquely combine FPGA-acceleration with tightly coupled domain-specific soft-processors to encapsulate the simulator in a software-like abstraction. The F3CAS simulation paradigm will be demonstrated in the evaluation of hybrid memory systems, which include emerging non-volatile memory technologies,  in high-performance computing systems.

Details

  • PI: David Novo (CNRS, LIRMM)
  • Start date: October 1, 2022
  • Project duration: 3.5 years
  • ANR funding: 230,000 €
  • ANR JCJC project: ANR-20-CE25-0010