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Welcome to VARI2010 Website

VARI 2010 is the first European workshops on CMOS Variability. The Vari meeting answer to the need to have an European event on variability , where industry and academia meet to discuss. VARI 2010 is organized by LIRMM.

The VARI objective is to provide a forum to discuss and investigate the CMOS variability problems in methodologies and tools for the design of upcoming generations of integrated circuits and systems. The technical program will focus on timing, performance and power consumption as well as architectural aspects with particular emphasis on modelling, design, characterization, analysis and optimization of variability.

The emphasis of the workshop is on, but not limited to, the following topics:

• Variability modelisation and consideration in tools
- Local variability : inductive stess, OPCs, …
- Uncertain phenomenom : doping
- Environmental variations (Vdd,T)
- Global process variations

• Conception tools and methodologies for variability
- Statistical approaches
- Multi-Corners approaches
- Tools for variability consideration at design and layout levels
- Layout post-treatment tools

• Measurements and sensors
- Timing slacks and faults
- Process, Temperature, Vdd
- Power and Energy

• Actuators
- Vdd, VBB scaling (global & local)
- Frequence scaling
- Delay Tuning

• Compensation at circuit Level
- Asynchronous, desynchronised tehniques
- Operationg point tracking
- Clock tree resynchronisation

• Compensation at layout Level
- Regular layout
- Restrictive design rules

• Compensation at architectural Level
- Tasks remapping according to hardware possibilities
- Global or distributed, static or dynamic optimisation



Extended submission deadline :
February 15 th

Notification of paper acceptance:
March 30, 2010

Deadline for final paper submission:
April 15, 2010