Keynote by A. ASENOV, Device Modeling Group, Glasgow University, UK
"Interaction between physical, compact model and circuit simulation of statistical variability"
Keynote by D. PANDINI, STMicroelectronics, Agrate Brianza, Italy
"Variability in Advanced Nanometer Technologies: Challenges and Solutions"
Keynote by N. Verkinderen, Texas Instruments, Villeneuve Loubet, France
"Variability effects on timing: margining or modeling? Statistical Static Timing Analysis and Advanced On Chip Variation techniques"
Keynote by F. MOLL, Universitat Politècnica de Catalunya, Barcelona, Spain
"Regular layout fabrics as a way to reduce variability"
Keynote by Y. TROUILLER, STMicroelectronics, Crolles, France
"RET solutions for System On Chip : from 120nm to 22nm node, an evolutionary scenario"
Keynote by G. COGNIAT, Lab-STICC, Lorient, France
"Challenges for future multiprocessor systems on chip”
Keynote by E. BEIGNE & M. BELLEVILLE, CEA-Leti, France
"Fine-grain Adaptive Architectures Based on Dynamic Actuators and Local Sensors”