David NOVO
 
 
 
 
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Contact
david.novo{at}lirmm.fr
LIRMM - CNRS
161 Rue Ada
34095 Montpellier (FR)
+33 (0)4 67 41 86 15







 

David Novo, tenured full-time researcher at LIRMM

Main Research Interests:
  • Neuromorphic computing
  • Machine learning
  • Reconfigurable computing
  • High-level synthesis
  • High performance and low power design methodologies
  • Non-volatile memory

About Me:
From January 2017, I will be a tenured full-time researcher (aka Chargé de Recherche, CR1) for the French National Center for Scientific Research (CNRS) in the ADAptive Computing (ADAC) group at the Montpellier Laboratory of Informatics, Robotics and Microelectronics (LIRMM).

Previously, I was a post-doctoral researcher at the EPFL School of Computer and Communication Sciences, where I joined the Processor Architecture Laboratory (LAP) in November 2010. Even longer ago, I conducted my doctoral research at the Wireless Group in the Interuniversity Microelectronics Centre (IMEC), receiving the Ph.D in Engineering from the Katholieke Universiteit Leuven (KUL) in 2010.

Why My Research Matters?
Fully renewable energy production, ubiquitous clean water supply, and personalized medicine are amongst the most important challenges facing mankind. I believe that engineering should play a key role in enabling novel and practical solutions to these paramount problems. In particular, more powerful analytic tools and more efficient technology will certainly catalyze the scientific process to find the desperately-needed solutions. Accordingly, my research focuses on discovering design methods to better explore the optimal alternatives in the implementation of digital computers. Actually, digital computer design is a multi-objective optimization problem, where only a few concrete realizations represent optimal tradeoffs between design objectives. Thus, I eagerly work in a number of research projects that aim at improving current digital computers in their key features, including energy efficiency, computational performance, productivity, cost and security.

 
Recent News
Jul 2016: I've been recruited as a tenured full-time researcher (aka CR1) by the French National Center for Scientific Research (CNRS). I'll be starting my new position on Jan 2017.
Feb 2016: Our paper, entitled "FPRESSO: Enabling Express Transistor-Level Exploration of FPGA Architectures", is the Best Paper Award winner of FPGA 2016.
Nov 2014: Our paper, entitled "Constrained Interpolation for Guided Logic Synthesis", is nominated Best Paper Runner-Up in the Front-End category at ICCAD 2014.
Nov 2014: Our tutorial, entitled "Fixed-point refinement, a guaranteed approach towards energy efficient computing", has been accepted for presentation at DATE 2015.
Sep 2014: Our paper, entitled "Enhancing design space exploration by extending CPU/GPU specifications onto FPGAs", has been accepted for publication in the ACM Transactions on Embedded Computing Systems.
Sep 2014: Our paper, entitled "Hardware System Synthesis from Domain-specific Languages", is presented at FPL 2014.
Jun 2014: Serving on the SiPS 2014 technical program committee.
Jun 2014: Our paper, entitled "Libra: Software Controlled Cell Bit-Density to Balance Wear in NAND Flash", has been accepted for publication in the ACM Transactions on Embedded Computing Systems.
Apr 2014: Serving on the SBCCI 2014 technical program committee.
Mar 2014: Serving on the ASAP 2014 technical program committee.
Mar 2014: Our two papers, entitled "Energy efficient MIMO Processing: a Case Study of Opportunistic Run-Time Approximations" and "SKETCHILOG: Sketching Combinational Circuits", are presented at DATE 2014.