Presenter: Soraya MOBARAKI

Abstract:
Companies and academia increasingly rely on simulation before fabrication to meet the demand for low-power and high-performance computer architecture designs due to the high manufacturing costs. However, software simulators are often too slow to run complete real-world applications, and FPGA-accelerated simulators have emerged as a more practical approach. However, FPGA-accelerated simulators are challenging to use and require hardware design expertise. In this context, we aim to make a new user-friendly, Fast, and Faithful Computer-System Architecture Simulation (F3CAS) approach to achieve FPGA-accelerated simulation. As our first use case, we want to add more cache replacement policies, evaluate them, and then move the cache replacement part to a soft processor to give flexibility to the user. F3CAS will combine FPGA acceleration with tightly coupled domain-specific programmable soft processors to provide a software-like abstraction.

Date: October 24, 2023 from 2 to 4 pm (salle de séminiaires, LIRMM*)