The international workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS) has evolved over the years into a well established and outstanding series of open European events on power and timing aspects of integrated circuit design. The increased interest, especially in low-power design, adds further momentum to the interest in this workshop. It is of benefit for your company to be associated with the conference to gain international visibility and recognition in this field. The amount of your financial support is let to your convenience and there are obviously no constraints.

The objective of the workshop is to provide a forum to discuss and investigate the emerging problems in the design methodologies and CAD-tools for the new generation of IC technologies. A major emphasis of the technical programme is on speed and low-power aspects with particular regards to modeling, characterization, design and architectures.