Event Date

April 24-26, 2019

Event Location

Cluj-Napoca, Romania

Contact us

Go to contact form

Submission Deadline

January 14 January 21 January 28, 2019

Notification of Acceptance

March 15, 2019

Camera-ready Papers

March 22, 2019

DDECS purpose

The International Symposium on Design and Diagnostics of Electronic Circuits and Systems provides a forum for exchanging ideas, discussing research results, and presenting practical applications in the areas of design, test, and diagnosis of electronic circuits and systems. The DDECS Symposium series has been organized by these European countries: Hungary (2001, 2005, 2018), Austria (2010), Germany (2011,2017), Estonia (2012), Czech Republic (1997, 2002, 2006, 2009, 2013), Poland (1998, 2003, 2007, 2014), Serbia (2015) and Slovakia (2000, 2004, 2008, 2016).

DDECS 2019 Topics

DDECS’19 covers the areas of design and testing of electronic components, both digital and analog. The topics include the following but are not limited to:

SoC and NoC Design and Test
ASIC/FPGA Design
Built-in Self-Test and Self-Repair
Bio-Inspired Hardware
Design Verification/Validation
Formal Methods in System Design
Hardware/Software Co-Design
IP-based Design
Logic Synthesis
Modeling, circuit design and test for emerging technologies-based data storage/memory
Modeling, circuit design and test for emerging technologies-based computation structures
Defect/Fault Tolerance and Reliability

Design and Test in Nano-Technologies
Analog, Mixed-Signal, RF Design and Test
ATE Hardware and Software
Design for Testability and Diagnosis
Embedded Systems
Dependable HW / SW Systems
On-line Testing
Memory, Processor Testing
MEMS Testing
Physical Design
Cyber Physical Systems
Industry 4.0
Embedded Machine Learning

Self-Aware Systems Design and Test
Unconventional Computing Paradigms
Emerging technologies-based logic design, test and reliability
Internet-of-Things Design and Test
Case Studies and Applications
Functional Safety
Reliability testing
Hardware Security and Trust
Security Primitives
Hardware Trojans
Fault and Side-Channel Attacks and Countermeasures
Hardware Security and Emerging Technologies

The Power of Computation-in-Memory: Beyond von Neumann and Beyond CMOS

Prof. Dr. Said Hamdioui

Head of Computer Engineering Laboratory - Delft University of Technology

Abstract: Today’s and emerging applications are extremely demanding in terms of storage and computing power. Data-intensive/big-data applications and internet-of-things (IoT) will transform the future; they will not only impact the all aspects of our life, but also change a lot in the IC and computer world. Emerging applications require computing power which was typical of supercomputers a few years ago, but with constraints on size, power consumption and guaranteed response time which are typical of the embedded applications. Both today’s computer architectures and device technologies (used to manufacture them) are facing major challenges making them incapable to deliver the required functionalities and features. In order for computing systems to continue deliver sustainable benefits for the foreseeable future society, alternative computing architectures and notions have to be explored in the light of emerging new device technologies.

This talk will first address the limitation of both CMOS scaling and today’s computing architectures. Then it shows some of emerging computing paradigms, and focuses on the discussions of the concept of computation-in-memory based on non-volatile emerging devices. Logic and arithmetic circuit designs enabling such architectures at lower time complexity are covered. The huge potential of such architecture in realizing order of magnitude improvement in terms of computing and energy efficiency is illustrated by comparing it with the state-of-the art architectures for different applications. Finally the research directions in computation-in-memory are highlighted.

About the speaker: Said Hamdioui (http://www.ce.ewi.tudelft.nl/hamdioui/) is currently Chair Professor on Dependable and Emerging Computer Technologies and Head of the Computer Engineering Laboratory (CE-Lab) of the Delft University of Technology, the Netherlands. He received the MSEE and PhD degrees (both with honors) from TUDelft. Prior to joining TUDelft as a professor, Hamdioui spent more than seven years within industry Intel Corporation (Califorina, USA), Philips Semiconductors R&D (Crolles, France) and Philips/ NXP Semiconductors (Nijmegen, The Netherlands). His research focuses on two domains: Dependable CMOS nano-computing (including Reliability, Testability, Hardware Security) and emerging technologies and computing paradigms (including 3D stacked ICs, memristors for logic and storage, in-memory-computiing).

Hamdioui owns two patents, has published one book and contributed to other two, and had co-authored over 190 conference and journal papers. He has consulted for many companies (such as Intel, ST, Altera, Atmel, Renesas, …) in the area of memory testing and has collaborated with many industry/research partners (examples are Intel, IMEC, NXP, Intrinsic ID, DS2, ST Microelectronics, Cadence, Politic di Torino, etc) in the field of dependable nano-computimng and emerging technologies. He is strongly involved in the international community as a member of organizing committees (e.g., general chair, program chair, etc) or a member of the technical program committees of the leading conferences. He delivered dozens of keynote speeches, distinguished lectures, and invited presentations and tutorial at major international forums/conferences/schools and at leading semiconductor companies. Hamdioui is a Senior member of the IEEE, Associate Editor of IEEE Transactions on VLSI Systems (TVLSI), and he serves on the editorial board of IEEE Design & Test, Elsevier Microelectronic Reliability Journal, and of the Journal of Electronic Testing: Theory and Applications (JETTA). He is also member of AENEAS/ENIAC Scientific Committee Council (AENEAS =Association for European NanoElectronics Activities).

Hamdioui is co-founder of CongnitiveIC, a high-tech startup active in hardware security and test. He is the recipient of many international/national awards. E.g., he is the the recipient of European Design Automation Association Outstanding Dissertation Award 2001; Best Paper Award at the International Conference on Frontier of Computer Science and Technology FCST-2017; Teacher of the Year Award at the faculty of Electrical Engineering, Delft University of Technology, the Netherlands; Best Paper Award at IEEE Computer Society Annual Symposium on VLSI (IVLSI) 2016; the 2015 HiPEAC Technology Transfer Award, Best Paper Award at 33rd IEEE International Conference on Computer Design ICCD 2015, Best paper Award at International conference on Design and Test of Integrated Systems in the nano-era DTIS 2011, IEEE Nano and Nano Korea award at IEEE NANO 2010, Intel informal Award for developed test methods for embedded caches in Itanuim processors. In addition, he is a leading member of Cadence Academic Network on Dependability and Design-for-Testability, and he was nominated for The Young Academy of the Royal Netherlands Academy of Arts and Sciences (KNAW) in 2009.

Hamdoui is also the initiator and the coordinator of an EU project on computation-in-memory architecture based on resistive devices (http://www.mnemosene.eu/).

Towards embedding attack detection on Systems-on-Chip

Anca Molnos - CEA

Abstract: Connected devices are increasingly targeted by cyber-security attacks. Such attacks may exploit software bugs, e.g., to install malware, and can go as far as physically interfering with the device by, e.g., side channel attacks or fault attacks to recover secret keys. Software and physical attacks can be combined, and give place to mixed, powerful means to gain control of a system.
Attack detection is a field that receives more and more attention because it has the potential to address several attacks at once. Machine learning methods can be applied in two steps. An off-line characterisation of the logical and physical properties of the Systems-on-Chip can give an idea about what is the nominal behaviour of the system. Run-time monitoring may determine if there are deviations from this behaviour. This talk will survey recent approaches for attack detection on Systems-on-Chip, for malware, memory attacks, and side-channel attacks. Furthermore our results on the utilisation of binary classification to design lightweight memory access detectors will be presented. Finally we will discuss the need to monitor heterogeneous features, e.g., physical, architectural and software, and future directions for research.

Can New Defect Models Help Eliminate System Level Tests?

Prof. Adit D. Singh
Dept. of Electrical & Computer Engineering - Auburn University

Abstract: ICs have long been tested for manufacturing defects using low cost scan tests. However, such structural tests no longer appear sufficient in ensuring the required test quality for complex processor SOCs. Expensive System Level Tests (SLTs), that temporarily mount the SOC on a test board closely replicating the target hardware application, are increasing being used to perform extensive functional testing as a final defect screen. In this talk we discuss the effectiveness of the advanced new defect models such as cell aware, timing aware cell aware, gate exhaustive, TSOF, etc. that have been introduced to improve the defect coverage of scan tests and thus minimize the need for SLTs. We also consider failure mechanisms that may be missed by even these new tests, in particular, timing failures resulting from an accumulation of the delays caused by random process variations.

General Chair:
Liviu Miclea

TECHNICAL UNIVERSITY OF CLUJ-NAPOCA, ROMANIA

Full Professor

Program Chair:
Alberto Bosio

INL – ECOLE CENTRALE DE LYON – CNRS, FRANCE

Full Professor

General Vice-Chair:
György Cserey

PÁZMÁNY PÉTER CATHOLIC UNIVERSITY, BUDAPEST, HUNGARY

Full professor

Program Vice-Chair:
Zoran Stamenkovic

IHP – FRANKFURT (ODER), GERMANY

Scientist

Publication Chair:
Alessandro Savino

Politecnico di Torino, Italy

Assistant Professor

Publicity Chair:
Ernesto Sanchez

Politecnico di Torino, Italy

Associate Professor

Publicity Chair:
Mario Barbareschi

University of Naples “Federico II”, Italy

Researcher

Web Chair:
Marcello Traiola

LIRMM – UNIVERSITY OF MONTPELLIER – CNRS, FRANCE

Ph.D. Student

DDECS Steering Committee

Full Name	Country	Email
Stopjaková Viera - Chair	Slovakia	viera.stopjakova@stuba.sk
Bosio Alberto	France	alberto.bosio@ec-lyon.fr
Cserey György	Hungary	cserey@itk.ppke.hu
Garbolino Tomasz	Poland	Tomasz.Garbolino@polsl.pl
Hrynkiewicz Edward	Poland	Edward.Hrynkiewicz@polsl.pl
Jelemenská Katarína	Slovakia	jelemenska.katarina@stuba.sk
Manhaeve Hans	Belgium	hans.manhaeve@qstar.be
Mario Scholzel	Germany	schoelzel@ihp-microelectronics.com
Novák Ondřej	Czech Republic	ondrej.novak@tul.cz
Pawlak Adam	Poland	Adam.Pawlak@polsl.pl
Plescacz Witold	Poland	W.Pleskacz@imio.pw.edu.pl
Raik Jaan	Estonia	Jaan.Raik@pld.ttu.ee
Sekanina Lukáš	Czech Republic	sekanina@fit.vutbr.cz
Stamenkovic Zoran	Germany	stamenko@ihp-microelectronics.com
Steininger Andreas	Austria	steininger@ecs.tuwien.ac.at
Vlček Karel	Czech Republic	vlcek@fai.utb.cz

Program Committee

Title	Last Name	First Name	Email	Organization	Country
Dr.	Amaru	Luca	Luca.Amaru@synopsys.com	Synopsys	USA
Prof.	Anheier	Walter	anheier@uni-bremen.de	University of Bremen	Germany
Dr.	Arbet	Daniel	daniel.arbet@stuba.sk	Faculty of Electrical Engineering and Information Technology, Slovak University of Technology	Slovakia
Dr.	Balaz	Marcel	marcel.balaz@savba.sk	Institute of Informatics SAS	Slovakia
Dr.	Barbareschi	Mario	mario.barbareschi@unina.it	University of Naples “Federico II”	Italy
Dr.	Barragan	Manuel	Manuel.Barragan@univ-grenoble-alpes.fr	TIMA	France
Dr.	Berke Yelten	Mustafa	yeltenm@itu.edu.tr	Istanbul Technical University	Turkey
Prof.	Bhat	M.S.	msb@nitk.ac.in	NITK India	India
Prof.	Bolchini	Cristiana	cristiana.bolchini@polimi.it	Politecnico di Milano	Italy
Prof.	Bosio	Alberto	alberto.bosio@ec-lyon.fr	LIRMM – University of Montpellier - CNRS	France
Dr.	Cantoro	Riccardo	riccardo.cantoro@polito.it	Politecnico di Torino	Italy
Prof.	Cserey	Gyorgy	gyorgy.cserey@itk.ppke.hu, cserey@gmail.com	Pazmany Peter Catholic University	Hungary
Dr.	Daněk	Martin	martin@daiteq.com	daiteq s.r.o.	Czech Republic
Dr.	Dietrich	Manfred	manfred.dietrich@dikuli.de, manfred.dietrich@tu-dresden.de	Dikuli Unternehmensberatung	Germany
Prof.	Drechsler	Rolf	drechsler@uni-bremen.de	University of Bremen/DFKI	Germany
Prof.	Drutarovsky	Milos	Milos.Drutarovsky@tuke.sk	Technical Universiity of Kosice	Slovak Republic
Prof.	Ellervee	Peeter	lrv@ati.ttu.ee	Tallinn University of Technology	Estonia
Prof.	Enachescu	Marius	m.enachescu@upb.ro	University Politehnica Bucharest	Romania
Prof.	Fey	Goerschwin	goerschwin.fey@tuhh.de	TU Hamburg	Germany
Dr.	Fišer	Petr	fiserp@fit.cvut.cz	Czech Technical University in Prague	Czech Republic
	Fuegger	Matthias	mfuegger@lsv.fr	CNRS & LSV, ENS Paris-Saclay	France
Dr.	Garbolino	Tomasz	Tomasz.Garbolino@polsl.pl	Silesian University of Technology	Poland
Dr.	Girard	Patrick	girard@lirmm.fr	LIRMM / CNRS	France
Prof.	Gizopoulos	Dimitris	dgizop@di.uoa.gr	University of Athens	Greece
Prof.	Hellebrand	Sybille	sybille.hellebrand@uni-paderborn.de	Paderborn University	Germany
Dr.	Jelemenska	Katarina	katarina.jelemenska@stuba.sk, jelemenska@fiit.stuba.sk	FIIT STU Bratislava	Slovak Republic
Prof.	Jervan	Gert	gert.jervan@ttu.ee	Tallinn University of Technology	Estonia
Dr.	Kasprowicz	Dominik	D.Kasprowicz@imio.pw.edu.pl	Warsaw University of Technology	Poland
Dr.	Keim	Martin	martin_keim@mentor.com	Mentor Graphics, Wilsonville	US
Prof.	Kitsos	Paris	pkitsos@teimes.gr	Technological Educational Institute of Western Greece	Greece
Prof.	Kraemer	Rolf	kraemer@ihp-microelectronics.com	IHP	Germany
Prof.	Krasniewski	Andrzej	A.Krasniewski@elka.pw.edu.pl	Warsaw University of Technology	Poland
Prof.	Krstic	Milos	krstic@ihp-microelectronics.com, mkrstic11@gmail.com	IHP	Germany
	Kubatova	Hana	kubatova@fit.cvut.cz	CTU in Prague	Czech Republic
	Kuzmicz	Wieslaw	wbk@imio.pw.edu.pl	Warsaw University of Technology	Poland
Prof.	Larsson	Erik	erik.larsson@eit.lth.se, erila@me.com	Lund University	Sweden
Prof.	Leveugle	Regis	Regis.Leveugle@univ-grenoble-alpes.fr	Grenoble INP	France
Dr.	Macko	Dominik	dominik.macko@stuba.sk	Faculty of Informatics and Information TechnologiSlovak University of Technology in Bratislava	Slovakia
Dr.	Maistri	Paolo	paolo.maistri@univ-grenoble-alpes.fr	TIMA	France
Dr.	Manhaeve	Hans	hans.manhaeve@qstar.be	Ridgetop Europe	Belgium
Prof.	Matsumura	Tetsuya	matsumura@cs.ce.nihon-u.ac.jp	Nihon University	Japan
Prof.	Metra	Cecilia	cecilia.metra@unibo.it	University of Bologna	Italy
Prof.	Miclea	Liviu-Cristian	Liviu.Miclea@aut.utcluj.ro, liviu.miclea@gmail.com	Technical University of Cluj-Napoca	Romania
Prof.	Moradi	Farshad	moradi@eng.au.dk	Aarhus University	Danemark
Prof.	Moreau	Mathieu	mathieu.moreau@univ-amu.fr	Aix-Marseille Universite	France
Dr.	Nagy	Lukas	lukas.nagy@stuba.sk	Slovak University of Technology	Slovak Republic
Prof.	Novak	Ondrej	ondrej.novak@tul.cz	TU Liberec	Czech Republic
Prof.	Ohtake	Satoshi	ohtake@oita-u.ac.jp	Oita University	Japan
Prof.	Ottavi	Marco	ottavi@ing.uniroma2.it	University of Rome Tor Vergata	Italy
Prof.	Pataricza	András	pataric@mit.bme.hu	Budapest University of Technology and Economics	Hungary
Dr.	Pawlak	Adam	Adam.Pawlak@polsl.pl	Silesian University of Technology	Poland
Prof.	Peng	Zebo	zebo.peng@liu.se	Linkoping University	Sweden
Prof.	Pierre	Laurence	Laurence.Pierre@univ-grenoble-alpes.fr	Université Grenoble Alpes	France
Prof.	Piestrak	Stanislaw J.	stanislaw.piestrak@univ-lorraine.fr	Université de Lorraine - Institut Jean Lamour	France
Prof.	Pleskacz	Witold	Pleskacz@imio.pw.edu.pl	Warsaw University of Technology	Poland
Dr.	Pleštil	Antonín	a.plestil@gmail.com	retired	Czech Republic
Dr.	Polzer	Thomas	thomas.polzer@technikum-wien.at, tpolzer@ecs.tuwien.ac.at	UAS Technikum Wien	Austria
Prof.	Portolan	Michele	michele.portolan@univ-grenoble-alpes.fr	TIMA	France
Prof.	Prinetto	Paolo	Paolo.Prinetto@polito.it	Politecnico di Torino	Italy
Prof.	Raida	Zbynek	raida@feec.vutbr.cz	Brno University of Technology	Czech Republic
Prof.	Raik	Jaan	jaan.raik@ttu.ee	Tallinn University of Technology	Estonia
Prof.	Rouzeyre	Bruno	rouzeyre@lirmm.fr	Université Montpellier	France
	Růžička	Richard	ruzicka@fit.vutbr.cz	Brno University of Technology	Czech Republic
Prof.	Sanchez	Ernesto	ernesto.sanchez@polito.it	Politecnico di Torino	Italy
Prof.	Sattler	Sebastian M.	sebastian.sattler@fau.de	Friedrich-Alexander-Universität Erlangen-Nürnberg	Germany
Prof.	Savino	Alessandro	alessandro.savino@polito.it	Politecnico di Torino	Italy
Dr.	Schneider	Peter	peter.schneider@eas.iis.fraunhofer.de	Fraunhofer IIS	Germany
Prof.	Schölzel	Mario	mario.schoelzel@hs-nordhausen.de	University of Applied Science Nordhausen	Germany
Prof.	Sekanina	Lukas	sekanina@fit.vutbr.cz	Brno University of Technology	Czech Republic
Dr.	Soeken	Mathias	mathias.soeken@epfl.ch	EPFL	Czech Republic
Prof.	Sonza Reorda	Matteo	matteo.sonzareorda@polito.it	Politecnico di Torino	Italy
Prof.	Sosnowski	Janusz	j.sosnowski@ii.pw.edu.pl, jss@ii.pw.edu.pl	Warsaw University of Technology	Poland
Dr.	Stamenkovic	Zoran	stamenko@ihp-microelectronics.com	IHP	Germany
Prof.	Steininger	Andreas	steininger@ecs.tuwien.ac.at	Vienna University of Technology	Austria
Prof.	Stojanovic	Goran	sgoran@uns.ac.rs	University of Novi Sad	Serbia
Prof.	Stopjakova	Viera	viera.stopjakova@stuba.sk	Slovak University of Technology	Slovak Republic
Dr.	Stratigopoulos	Haralampos	haralampos.stratigopoulos@lip6.fr	LIP6	France
Dr.	Subrt	Ondrej	ondrej.subrt@asicentrum.cz	ASICentrum	Czech Republic
Prof.	Tammemäe	Kalle	kalle.tammemae@taltech.ee	Tallinn University of Technology	Estonia
Dr.	Taouil	Mottaqiallah	m.taouil@tudelft.nl	Delft University of Technology	The Netherlands
Prof.	Teixeira	Paulo	paulo.teixeira@tecnico.ulisboa.pt, paulo.teixeira@ist.utl.pt	INESC.ID Lisboa	Portugal
	Traiola	Marcello	traiola@lirmm.fr	LIRMM – University of Montpellier - CNRS	France
Prof.	Ubar	Raimund	raiub@pld.ttu.ee	Tallinn University of Technology	Estonia
Prof.	Udrescu	Mihai	mudrescu@cs.upt.ro	University Politehnica of Timisoara	Romania
Dr.	Vázquez	Diego	dvazquez@us.es, dgarcia@imse-cnm.csic.es	Instituto de Microelectrónica de Sevilla / Universidad de Sevilla	Spain
	Venini	Federico	federico.venini@xilinx.com	Xilinx	US
	Vierhaus	Heinrich	Heinrich.Vierhaus@b-tu.de	Brandenburg University of Technology	Germany
Prof.	Vierhaus	Heinrich Theodor	htv@informatik.tu-cottbus.de	BTU Cottbus-Senftenberg	Germany
Prof.	Virazel	Arnaud	virazel@lirmm.fr	LIRMM	France
Prof.	Vlcek	Karel	vlcek@fai.utb.cz	Tomas Bata University	Czech Republic
Prof.	Wille	Robert	robert.wille@jku.at	Johannes Kepler University Linz	Austria
Prof.	Wunderlich	Hans-Joachim	wu@informatik.uni-stuttgart.de	Universität Stuttgart	Germany
Dr.	Zachariasova	Marcela	zachariasova@fit.vutbr.cz	Brno University of Technology	Czech Republic
Dr.	Zorian	Yervant	y.zorian@computer.org	Synopsys	USA

DDECS 2019 Local Organizing Committee

Full Name	Affiliation	Position
Mihail Abrudean	Technical University of Cluj Napoca, Romania	Professor
Honoriu Vălean	Technical University of Cluj Napoca, Romania	Full Professor
Enyedi Szilárd	Technical University of Cluj Napoca, Romania	Associate Professor
Ovidiu Stan	Technical University of Cluj Napoca, Romania	Senior Lecturer
Dan Goța	Technical University of Cluj Napoca, Romania	Teaching Assistant
Cosmina Corcheș	Technical University of Cluj Napoca, Romania	PhD Student
Cristian Goia	Technical University of Cluj Napoca, Romania	Eng.
Adela Pușcașiu	Technical University of Cluj Napoca, Romania	Teaching Assistant
Alexandra Fanca	Technical University of Cluj Napoca, Romania	Teaching Assistant

General Chair: Liviu MICLEA (Liviu.Miclea@aut.utcluj.ro)

Program Chair: Alberto BOSIO (alberto.bosio@ec-lyon.fr)

Event Date

Event Location

Contact us

SoC and NoC Design and Test

ASIC/FPGA Design

Built-in Self-Test and Self-Repair

Bio-Inspired Hardware

Design Verification/Validation

Formal Methods in System Design

Hardware/Software Co-Design

IP-based Design

Logic Synthesis

Modeling, circuit design and test for emerging technologies-based data storage/memory

Modeling, circuit design and test for emerging technologies-based computation structures

Defect/Fault Tolerance and Reliability

Design and Test in Nano-Technologies

Analog, Mixed-Signal, RF Design and Test

ATE Hardware and Software

Design for Testability and Diagnosis

Embedded Systems

Dependable HW / SW Systems

On-line Testing

Memory, Processor Testing

MEMS Testing

Physical Design

Cyber Physical Systems

Industry 4.0

Embedded Machine Learning

Self-Aware Systems Design and Test

Unconventional Computing Paradigms

Emerging technologies-based logic design, test and reliability

Internet-of-Things Design and Test

Case Studies and Applications

Functional Safety

Reliability testing

Hardware Security and Trust

Security Primitives

Hardware Trojans

Fault and Side-Channel Attacks and Countermeasures

Hardware Security and Emerging Technologies

TECHNICAL UNIVERSITY OF CLUJ-NAPOCA, ROMANIA

Full Professor

INL – ECOLE CENTRALE DE LYON – CNRS, FRANCE

Full Professor

PÁZMÁNY PÉTER CATHOLIC UNIVERSITY, BUDAPEST, HUNGARY

Full professor

IHP – FRANKFURT (ODER), GERMANY

Scientist

Politecnico di Torino, Italy

Assistant Professor

Politecnico di Torino, Italy

Associate Professor

University of Naples “Federico II”, Italy

Researcher

LIRMM – UNIVERSITY OF MONTPELLIER – CNRS, FRANCE

Ph.D. Student

CZECH TECHNICAL UNIVERSITY IN PRAGUE, CZ

TIMA LABORATORY, CNRS, GRENOBLE, FR

POLITECNICO DI TORINO, IT

VIENNA UNIVERSITY OF TECHNOLOGY, AT

TIMA LABORATORY, CNRS, GRENOBLE, FR

UNIVERSITY OF NOVI SAD, SRB