Third Workshop on Approximate Computing

May 31 - June 01, 2018

Approximate Computing leverages the intrinsic error resilience of applications to inaccuracy in their inner calculations, in order to achieve a required trade-off between efficiency, in terms of performance and power demanding, and acceptable error of returned results. In particular, for audio, image and video processing, data mining and information retrieval, approximate results turn out hard to distinguish from perfect ones. In recent years, Approximate Computing applicability is broadening and it has been representing a breakthrough in many scientific areas. Suitable solutions comes from approximate arithmetic operators, implemented both at hardware and software level, but from unreliable memory architectures, integrated circuit test, compilers and many others.

The aim of this workshop is the investigation of connections between AxC paradigm and the verification, the test and the reliability of digital circuits from two points of view:

  • how the approximate computing paradigm impacts the design and manufacturing flow of integrated circuits;
  • how the verification, testing and reliability disciplines can be exploited in the approximate computing paradigms.

You are invited to participate and submit your contributions to the AxC Workshop. The workshop's areas of interest include (but are not limited to) the following topics:

  • Modeling, specification, and verification of approximate circuits and systems;
  • Approximation induced error modeling and propagation;
  • Test and fault tolerance of approximate circuits and systems;
  • On-line test, monitoring and reconfiguration of approximate circuits and systems;
  • Dependability of approximate circuits and systems;
  • Applications and case studies;
  • Error Resilient Near-Threshold Computing;
  • Software-based fault tolerant technique for approximate computing;
  • Computing on unreliable hardware.
  • Preliminary Call for Papers

    Important Dates

    • Submission deadline : March 2, 2018
    • Notification of acceptance : April 10, 2018
    • Camera-ready material : April 27, 2018

    Paper Submission

    The Workshop prefers Full Paper submissions (of up to six pages), but also allows Extended Abstract submissions (of at least two pages). Each submission has to be in a standard IEEE format. The IEEE template can be found here.

    Submission website is open, submit your paper on EasyChair


    Keynote 1: Thursday, May 31st

    Design and Test for Approximate Computing - On the Curse and Beauty of Randomness

    Abstract: At the end of the "Happy Scaling" Era, designers struggle to meet expectations on performance and power consumption because new technology generations provide only limited performance and energy benefits. Under such pressure, the well-established idea to accept a certain level of inaccuracy in computations to reduce complexity experiences a spectacular revival. However, besides numerous conventional techniques, known from VLSI Signal Processing, "Approximate Computing" also includes fundamentally new and different ideas which also come with new challenges. In this talk, we first map out the field and discuss the various flavors of Approximate Computing and then focus on those ideas that are different from the classical joint optimization of algorithms and architectures. In particular, we discuss the new concept of "computing with unreliable hardware" to overcome the variability and reliability issues in modern technologies. In this context, we focus not only on the design aspect, but also on the problem of testing, which is clearly among the most critical issues to eventually succeed in main-stream products.

    Speaker: Prof. Andreas Burg.

    Keynote 2: Friday, June 1st

        Speaker: Prof. Olivier Sentieys.

    Organizing Committee

    General Co-Chair: Alberto Bosio - LIRMM (FR)
    General Co-Chair: Mario Barbareschi - DIETI (IT)
    Program Chair: Claus Braun - Stuttgart U (D)

    Steering Committee

    Jie HanU. Alberta (CA)
    Sybille HellebrandPaderborn U (D)
    Jörg HenkelKIT (D)
    Anand RaghunathanPurdue U (USA)
    Kaushik RoyPurdue U (USA)
    Hans-Joachim WunderlichStuttgart U (D)

    Program Committee (to include)

    Mounir BenabdenbiUniversity of Grenoble–Alpes, TIMA Laboratory. (F)
    Stefano Di CarloPolitecnico di Torino (I)
    Tong-Yu HsiehNational Sun Yat-sen U (TW)
    Marco PlatznerPaderborn U (D)
    Paolo RechUFRGS (B)
    Alessandro SavinoPolitecnico di Torino (I)
    Ernesto SanchezPolitecnico di Torino (I)
    Lukas SekaninaBrno U (CZ)
    Muhammad ShafiqueTU Wien (AT)
    Jürgen TeichErlangen-Nuremberg U (D)
    Elena Ioana VatajeluUniversity of Grenoble–Alpes, TIMA Laboratory. (F)


    AxC will take place in conjunction with the IEEE European Test Symposium 2018 at Swissôtel Bremen


    Registration has to be done through the ETS18 webpage