Third Workshop on Approximate Computing

May 31 - June 01, 2018

Approximate Computing leverages the intrinsic error resilience of applications to inaccuracy in their inner calculations, in order to achieve a required trade-off between efficiency, in terms of performance and power demanding, and acceptable error of returned results. In particular, for audio, image and video processing, data mining and information retrieval, approximate results turn out hard to distinguish from perfect ones. In recent years, Approximate Computing applicability is broadening and it has been representing a breakthrough in many scientific areas. Suitable solutions comes from approximate arithmetic operators, implemented both at hardware and software level, but from unreliable memory architectures, integrated circuit test, compilers and many others.

The aim of this workshop is the investigation of connections between AxC paradigm and the verification, the test and the reliability of digital circuits from two points of view:

  • how the approximate computing paradigm impacts the design and manufacturing flow of integrated circuits;
  • how the verification, testing and reliability disciplines can be exploited in the approximate computing paradigms.

You are invited to participate and submit your contributions to the AxC Workshop. The workshop's areas of interest include (but are not limited to) the following topics:

  • Modeling, specification, and verification of approximate circuits and systems;
  • Approximation induced error modeling and propagation;
  • Test and fault tolerance of approximate circuits and systems;
  • On-line test, monitoring and reconfiguration of approximate circuits and systems;
  • Dependability of approximate circuits and systems;
  • Applications and case studies;
  • Error Resilient Near-Threshold Computing;
  • Software-based fault tolerant technique for approximate computing;
  • Computing on unreliable hardware.
  • Preliminary Call for Papers

    Thursday, 31 May 2018

    16:30 - 17:30 Opening & Keynote 1

    17:30 - 18:20 Session I: TEST

    • On the Testing of Approximate Integrated Circuits for Embedded applications considering Average-Error Metrics
      Marcello Traiola, Arnaud Virazel, Patrick Girard (LIRMM/CNRS, France)
    • ATE-Accuracy Trade-Offs for Approximate Adders and Multipliers in Pipelined Processor Datapaths
      M. Weißbrich (Institute of Microelectronic Systems, Leibniz Universität Hannover, Germany), A. Najafi, A. García-Ortiz (Institute of Electrodynamics and Microelectronics, Universität Bremen, Germany), G. Payá-Vayá (Institute of Microelectronic Systems, Leibniz Universität Hannover, Germany)

    18:20 - 19:00 Welcome Reception

    Friday, 01 June 2018

    09:00 - 10:00 Keynote 2

    10:00 - 10:30 Coffee Break

    10:30 - 12:00 Session II: DESIGN

    • On the Maximum Function in Stochastic Neural Networks
      Florian Neugebauer (Faculty of Computer Science & Mathematics University of Passau, Germany), Ilia Polian (Institute of Computer Architecture and Computer Engineering, University of Stuttgart, Germany), John P. Hayes (Computer Engineering Laboratory University of Michigan, USA)
    • CIRCA: Towards a Modular and Extensible Framework for Approximate Circuit Generation
      Linus Witschen, Tobias Wiersema, Hassan Ghasemzadeh Mohammadi, Muhammad Awais, Marco Platzner (Paderborn University, Germany)
    • Evaluation of Approximate Computing Techniques for Power Reduction on FPGAs
      Jorge Echavarria, Katja Schütz, Andreas Becher, Stefan Wildermann, Jürgen Teich (Friedrich-Alexander-Universität, Gemrany)
    • Using MTBDDs for Error-Metric Evaluation in Computer Algebra Based Approximate Hardware Generation
      Saman Froehlich (Cyber-Physical Systems, DFKI GmbH, Germany), Daniel Grosse (University of Bremen & DFKI, Germany), Rolf Drechsler (University of Bremen, Germany)

    12:00 - 13:00 Lunch

    13:00 - 14:30 Special Session: Approximate Computing Across the Hardware and Software Stacks

    • Approximate Computing for Machine Learning: A Cross-Layer Approach
      Muhammad Shafique, M. Abdullah Hanif (TU Wien, Austria)
    • Error Propagation Estimation on Approximate Designs with Compiler-Driven Support
      Jörg Henkel, Jorge Castro-Godínez (KIT, Germany)
    • Automated synthesis of approximate circuits
      Zdenek Vasicek (Brno University of Technology, Czech Republic)

    14:30 - 15:00 Coffee Break

    15:00 - 16:35 Session III: RELIABILITY

    • A low-cost approach for determining the impact of Functional Approximation
      Marcello Traiola (LIRMM/CNRS), Alessandro Savino, Stefano Di Carlo (Politecnico di Torino, Italy)
    • No-Reference Error-Tolerability Evaluation for Videos via Edge and Extreme-Value Checking
      Tong-Yu Hsieh, Shang-En Chan, Chao-Ru Chen, Pao-Chien Li, Chi-Hsuan Ho (Department of Electrical Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan)
    • Increasing Circuit Lifetime by Accepting Precise Adders to work as Approximate Ones
      W. J. Perez-Holguin (UPTC GIRA Group Sogamoso, Colombia), E. Sanchez (Politecnico di Torino, Italy)
    • On Using Approximate Computing
 to Build an Error Detection Scheme
      B. Deveautour A. Virazel P. Girard (LIRMM/CNRS, France)
    • Performances VS Reliability: Approximate Computing can make the difference
      Gennaro S. Rodrigues, Fernanda L. Kastensmidt (Instituto de Informatica, PGMicro Universidade Federal do Rio Grande do Sul, Brazil), Vincent Pouget (IES University of Montpellier CNRS, France)

    16:35 Closing

    Important Dates

    • Submission deadline : March April 2 8, 2018 (Extended)
    • Notification of acceptance : April 23, 2018

    Paper Submission

    The Workshop prefers Full Paper submissions (of up to six pages), but also allows Extended Abstract submissions (of at least two pages). Each submission has to be in a standard IEEE format. The IEEE template can be found here.

    Submission website is open, submit your paper on EasyChair


    Keynote 1: Thursday, May 31st

    Design and Test for Approximate Computing - On the Curse and Beauty of Randomness

    Abstract: At the end of the "Happy Scaling" Era, designers struggle to meet expectations on performance and power consumption because new technology generations provide only limited performance and energy benefits. Under such pressure, the well-established idea to accept a certain level of inaccuracy in computations to reduce complexity experiences a spectacular revival. However, besides numerous conventional techniques, known from VLSI Signal Processing, "Approximate Computing" also includes fundamentally new and different ideas which also come with new challenges. In this talk, we first map out the field and discuss the various flavors of Approximate Computing and then focus on those ideas that are different from the classical joint optimization of algorithms and architectures. In particular, we discuss the new concept of "computing with unreliable hardware" to overcome the variability and reliability issues in modern technologies. In this context, we focus not only on the design aspect, but also on the problem of testing, which is clearly among the most critical issues to eventually succeed in main-stream products.

    Speaker: Prof. Andreas Burg.

    Keynote 2: Friday, June 1st

    Playing with number representations and operator-level approximations

    Abstract: Energy consumption is one of the major issues in computing today shared by all domains in computer science, from high-performance computing to embedded systems. The two main factors that influence energy consumption is the execution time and data volume. In the recent years, approximation is receiving renewed interests to improve both speed and energy consumption in embedded systems. Many applications in embedded systems do not require high precision/accuracy, and both software designers and hardware designers often seek for a golden point of the compromise between accuracy, speed, energy, and area cost in several layers with a broad range from application, software levels to architecture, circuit levels. Various techniques for approximate computing (AC) augment the design space by providing another set of design knobs for performance-accuracy trade-off. Stochastic computing (SC) is also seen as an alternative to conventional computing, since requiring less hardware and being more tolerant to soft errors at the expense of higher latency. SC uses a probabilistic model of computation and requires less hardware to implement complex operations. This talk will review the main techniques for operator-level approximations using various number representations and by playing with data word-length and types of operators, to show their benefit and drawbacks in terms of energy efficiency. We will also introduce the basic concepts of stochastic computing as well as its advantages in terms of robustness to errors and fair limitations.

    Speaker: Prof. Olivier Sentieys.

    Organizing Committee

    General Co-Chair: Alberto Bosio - LIRMM (FR)
    General Co-Chair: Mario Barbareschi - DIETI (IT)
    Program Chair: Claus Braun - Stuttgart U (D)

    Steering Committee

    Jie HanU. Alberta (CA)
    Sybille HellebrandPaderborn U (D)
    Jörg HenkelKIT (D)
    Anand RaghunathanPurdue U (USA)
    Kaushik RoyPurdue U (USA)
    Hans-Joachim WunderlichStuttgart U (D)

    Program Committee (to include)

    Mounir BenabdenbiUniversity of Grenoble–Alpes, TIMA Laboratory. (F)
    Stefano Di CarloPolitecnico di Torino (I)
    Dimitris GizopoulosUniversity of Athens (GR)
    Tong-Yu HsiehNational Sun Yat-sen U (TW)
    Marco PlatznerPaderborn U (D)
    Paolo RechUFRGS (B)
    Alessandro SavinoPolitecnico di Torino (I)
    Ernesto SanchezPolitecnico di Torino (I)
    Lukas SekaninaBrno U (CZ)
    Muhammad ShafiqueTU Wien (AT)
    Jürgen TeichErlangen-Nuremberg U (D)
    Elena Ioana VatajeluUniversity of Grenoble–Alpes, TIMA Laboratory. (F)
    Arnaud VirazelLIRMM (F)


    AxC will take place in conjunction with the IEEE European Test Symposium 2018 at Swissôtel Bremen


    Registration has to be done through the ETS18 webpage