ADAC: ADAptive Computing
The ADAC (ADAptive Computing) team, whose mission is the design of adaptive systems and components capable of self-managing to optimize performance, conducts research on the exploration, simulation, and definition of innovative embedded hardware and software architectures, with a focus on the systems’ on-line adaptation to their environment. These strategies aim to optimize system performance in terms of energy efficiency, compliance with application constraints, safety or reliability. This work is based on integrated parallel (multi-core and multi-processor systems) or distributed (grids, sensor networks) computing and attempts to integrate the use of non-volatile emerging technologies such as magnetic memories (MRAM) with new properties. Significant resources are committed to the definition of the various facets of adaptive systems such as measurement (sensors), data fusion/integration, online decision-making and actuation (task migration, among others). This work is contextualized in various application domains ranging from IoT to intensive computing and digital security.
Research topics
The ADAC group conducts research on 3 main scientific directions, as follows:
Topic 1 : Innovative hardware and software architectures
Energy efficiency has emerged as a prominent concern, driven by a broad range of societal and scientific challenges such as sustainability. The ADAC group focuses on the exploration of hardware, software and high-level resource management solutions for enabling significant advances towards the definition of next-generation compute systems. A specific emphasis on Adaptation is often put on various substrates such as highly constrained devices such as sensor nodes, and heterogeneous or homogeneous multicore / multiprocessor systems across various considerations (monitoring, migration of software objects). Online decision making is often key to achieving significant improvements and is also at the core of the motivations (s.a. modeling, forecasting, decision making). Targeted systems comprise a large set of applications from the Internet of Things to compute clusters, notably with several projects tackling adaptation at a wider than usual scope, encompassing energy transfer and storage across compute nodes, or optimization of resource management in a network of connected devices.
Topic 2 : Technology integration
The ADAC group conducts research in the area of technology hybridization, notably on the exploitation of non-volatile emerging memory technologies. Projects include the use of MRAM memories in various flavours of compute systems ranging from ultra-low energy microcontrollers for IoT to high-performance compute nodes. Contributions include CMOS/MRAM hybrid-cells, compilation/scheduling techniques alongside novel approaches at microarchitecture-level (caches, Normally-off Computing), communication-level (technology-aware NoCs) or technology-level (FPGA, PVT sensing, data-mining and design of compact models for run-time power / energy / temperature estimation).
Topic 3 : Security
Research works are also carried out in the area of security at various levels, with a notable emphasis on embedded systems (secure on-chip communications), IoT (blockchains for IoT devices) and industrial networks. A strong expertise of side-channel attacks (SCA) is also at the core of an open platform devoted to research and education (SECNUM) within the scope of the CNFM education network.
Research Contracts
DREAM CLOUD :
Dynamic Resource Allocation In Embedded and High Performance Computing
Travaux sur l’assignation dynamique de ressources dans les systèmes multicoeurs (axe1)
IOTEROP :
Architecture distribuée de passerelles réseaux interopérables et collaborative
Accompagnement de la maturation de la startup IOTEROP (axe1)
MONT-BLANC3 :
European scalable and power efficient HPC platform based on low power embedded technology
Travaux sur la simulation orienté traces, l’exploration de systèmes multicoeurs hétérogènes et les mémoires émergentes pour le calcul intensif (axes1et 2)
SECNUM :
Plateforme SECNUM Cryptographie et sécurité Numérique (FEDER)
Projet d'investissement pour la plateforme sécurité numérique SECNUM (support de l'axe 3)
MULTISMART :
Plateforme sécurisée à mémoire magnétique Multi bits innovante pour Smart Cards
Conception à l'aide de mémoire MRAM Multi[bits (Axe2)
MASTA :
MRAM BASED DESIGN, TEST AND RELIABILITY FOR ULTRA LOW POWER SoC
Projet sur la conception d'architectures logicielles/matérielles ultra basse consommation à base de MRAM (Axe2)
GREAT :
Hetero Geneous integrated Magnetic technology using multifunctional standardized sTack (MSS)
Conception de systèmes très faible consommation à base de mémoires MRAM, application à l'IOT (Axe1et 2)
CONTINUUM :
Design Continuum for Next Generation Energy Efficient Compute Nodes
Travaux sur des architectures matérielles hétérogènes intégrant des mémoires non volatiles, et des techniques de compilation adaptées (axe1)
Outreach
Le rayonnement des membres de l’équipe se caractérise à partir des indicateurs suivants sur la période 2013-2016 :
• Evaluation / Expertise
- Comité d’Evaluation ANR Défis Micro et Nanotechnologies,
- Membre du comité Scientifique de l'ANR Nanosciences & STIC,
- Participations à plusieurs groupes de travail prospectifs,
- Croucher Fundation – Fondation privée pour la recherche - Hong-Kong
• Communication et évènements scientifiques
- Organisation du Colloque BRAFITEC 2016 (Franco-Brésilien)
- Création du workshop RECOSOC, organisation des éditions 2011 et 2014
- Membre de Comités de pilotage : IEEE FPL, RECOSOC, IEEE ISVLSI, CRYPTARCHI, IEEE NVMSA,
- Working group IFIP 10.5 : « Design and Engineering of Electronic Systems »,
- Associate Editor : ACM Transactions on Embedded Computing Systems,
Membre de comité des programmes des principales conférences du domaine.
Members
Staff
- Pascal Benoit, Assistant Professor UM
- Florent Bruguier, Assistant Professor UM
- Abdoulaye Gamatié, Research Director CNRS
- David Novo, Research Fellow CNRS
- Michel Robert, Professor UM
- Gilles Sassatelli, Research Director CNRS
- Lionel Torres, Professor UM
Associates & Students
- Odilia Coi, PhD student
- Marcos De Melo Da Silva, Research associate CNRS
- Paul Delestrac, PhD student UM
- Guillaume Devic, PhD student CNRS
- Francesco Di Gregorio, PhD student CNRS
- Loic France, PhD student UM
- Maxime France Pillois, Research associate CNRS
- Quentin Huppert, PhD student UM
- Maxime Mirka, PhD student UM
- Maria Mushtaq, Research associate CNRS
- Lucas Sardois, Research associate CNRS
- Theo Soriano, PhD student UM
Publications 2014 - 2019: Evaluation period
International Journals
2020
- Practical Experiments to Evaluate Quality Metrics of MRAM-Based Physical Unclonable FunctionsLionel Torres, Arash Nejat, Bertrand Cambou, Frédéric Ouattara, Ken Mackay, Mohammad MohammadinodoushanIEEE Access, IEEE, 2020, 8, pp.176042-176049.
- Spin-Transfer Torque Magnetic Tunnel Junction for Single-Event Effects Mitigation in IC DesignOdilia Coi, Gregory Di Pendina, Guillaume Prenat, Lionel TorresIEEE Transactions on Nuclear Science, Institute of Electrical and Electronics Engineers, 2020, 67 (7), pp.1674-1681.
- WHISPER A Tool for Run-time Detection of Side-Channel AttacksMaria Mushtaq, Jeremy Bricq, Muhammad Khurram Bhatti, Ayaz Akram, Vianney Lapotre, Guy Gogniat, Pascal BenoitIEEE Access, IEEE, 2020, 8, pp.83871-83900.
- Meet the Sherlock Holmes’ of Side Channel Leakage: A Survey of Cache SCA Detection TechniquesAyaz Akram, Maria Mushtaq, Muhammad Khurram Bhatti, Vianney Lapotre, Guy GogniatIEEE Access, IEEE, 2020, 8, pp.70836-70860.
- Water Management in Agriculture: A Survey on Current Challenges and Technological SolutionsAbdelmadjid Saad, Abou El Hassan Benyamina, Abdoulaye GamatiéIEEE Access, IEEE, 2020, 8, pp.38082-38097.
- Winter is here! A decade of cache-based side-channel attacks, detection & mitigation for RSAMaria Mushtaq, Muhammad Asim Mukhtar, Vianney Lapotre, Muhammad Bhatti, Guy GogniatInformation Systems, Elsevier, In press. <10.1016/j.is.2020.101524>
2019
- Empirical Model-Based Performance Prediction for Application Mapping on Multicore ArchitecturesAbdoulaye Gamatié, Xin An, Ying Zhang, An Kang, Gilles SassatelliJournal of Systems Architecture, Elsevier, 2019, 98, pp.1-16.
- A gem5 trace-driven simulator for fast architecture exploration of OpenMP workloadsAlejandro Nocua, Florent Bruguier, Gilles Sassatelli, Abdoulaye GamatiéMicroprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2019, 67, pp.42-55.
- Towards Energy-Efficient Heterogeneous Multicore Architectures for Edge ComputingAbdoulaye Gamatié, Guillaume Devic, Gilles Sassatelli, Stefano Bernabovi, Philippe Naudin, Michael ChapmanIEEE Access, IEEE, 2019, 7, pp.49474-49491.
- Evaluation of SPN-Based Lightweight Crypto-CiphersLoïc Dalmasso, Florent Bruguier, Pascal Benoit, Lionel TorresIEEE Access, IEEE, 2019, 7, pp.10559-10567.
- Actions de vulgarisation du guichet national de formation continue du GIP-CNFMBéatrice Pradarelli, Pascal Nouet, Pascal Benoit, Olivier BonnaudJournal sur l'enseignement des sciences et technologies de l'information et des systèmes, EDP Sciences, 2019, 18, pp.1022.
- Static Prediction of Silent StoresFernando Magno Quintão Pereira, Guilherme Leobas, Abdoulaye GamatiéACM Transactions on Architecture and Code Optimization, Association for Computing Machinery, 2019, 15 (4), pp.#44.
- Practical Experiments on Fabricated TAS-MRAM Dies to Evaluate the Stochastic Behavior of Voltage-controlled TRNGsFrédéric Ouattara, Arash Nejat, Lionel Torres, Ken MackayIEEE Access, IEEE, 2019, 7, pp.59271-59277.
- Exploiting memory allocations in clusterized many-core architecturesRafael Garibotti, Luciano Ost, Anastasiia Butko, Ricardo Reis, Abdoulaye Gamatié, Gilles SassatelliIET Computers & Digital Techniques, Institution of Engineering and Technology, 2019, pp.1-9.
- Design and Evaluation of a 28-nm FD-SOI STT-MRAM for Ultra-Low Power microcontrollersGuillaume Patrigeon, Pascal Benoit, Lionel Torres, Sophiane Senni, Guillaume Prenat, Gregory Di PendinaIEEE Access, IEEE, In press, 7, pp.58085-58093.
2018
- A high-reliability and low-power computing-in-memory implementation within STT-MRAMLiuyang Zhang, Erya Deng, Hao Cai, You Wang, Lionel Torres, Aida Todri-Sanial, Youguang ZhangMicroelectronics Journal, Elsevier, 2018, 81, pp.69-75.
- Exploration of a scalable and power-efficient asynchronous Network-on-Chip with dynamic resource allocationCharles Effiong, Gilles Sassatelli, Abdoulaye GamatiéMicroprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2018, 60, pp.173-184.
- PoETE: A Method to Design Temperature-Aware Integrated SystemsMohamad El Ahmad, Mohamad Najem, Pascal Benoit, Gilles Sassatelli, Lionel TorresJournal of Low Power Electronics, American Scientific Publishers, 2018, 14 (1), pp.1-7.
- Addressing the Thermal Issues of STT-MRAM From Compact Modeling to Design TechniquesLiuyang Zhang, Yuanqing Cheng, Kang Wang, Lionel Torres, Youguang Zhang, Aida Todri-SanialIEEE Transactions on Nanotechnology, Institute of Electrical and Electronics Engineers, 2018, 17 (2), pp.345-352.
- A Ring Oscillator-Based Identification Mechanism Immune to Aging and External Working ConditionsMario Barbareschi, Giorgio Di Natale, Lionel Torres, Antonino MazzeoIEEE Transactions on Circuits and Systems I: Regular Papers, IEEE, 2018, 65 (2), pp.700-711.
2017
- Design Space Exploration of LDPC Decoders Using High-Level SynthesisJoão Andrade, Nithin George, Kimon Karras, David Novo, Frederico Pratas, Leonel Sousa, Paolo Ienne, Gabriel Falcão, Vítor SilvaIEEE Access, IEEE, 2017, 5, pp.14600-14615.
- A Design-Time Method for Building Cost-Effective Run-Time Power MonitoringMohamad Najem, Pascal Benoit, Mohamad El Ahmad, Gilles Sassatelli, Lionel TorresIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, IEEE, 2017, 36 (7), pp.1153-1166.
- Computing reliability: On the differences between software testing and software fault injection techniquesMaha Kooli, Firas Kaddachi, Giorgio Di Natale, Alberto Bosio, Pascal Benoit, Lionel TorresMicroprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2017, 50, pp.102-112.
- Fine-Grained Monitoring For Self-Aware Embedded SystemsMohamad Najem, Pascal Benoit, Gilles Sassatelli, Lionel Torres, Mohamad El AhmadMicroprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2017, 48, pp.3-10.
- Normally-Off Computing and Checkpoint/Rollback for Fast, Low-Power, and Reliable DevicesSophiane Senni, Lionel Torres, Pascal Benoit, Abdoulaye Gamatié, Gilles SassatelliIEEE Magnetics Letters, IEEE, 2017, 8, pp.1-5.
- Enseignement de la sécurité numérique : De la sensibilisation à l'expertiseFlorent Bruguier, Pascal Benoit, Lionel TorresJournal sur l'enseignement des sciences et technologies de l'information et des systèmes, EDP Sciences, 2017, 16. <10.1051/j3ea/20171004>
2016
- Ring oscillators analysis for security purposes in Spartan-6 FPGAsMario Barbareschi, Giorgio Di Natale, Florent Bruguier, Pascal Benoit, Lionel TorresMicroprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2016, 47 (Part A), pp.3-10.
- Non-Volatile Processor Based on MRAM for Ultra-Low-Power IoT DevicesSophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye GamatiéACM Journal on Emerging Technologies in Computing Systems, Association for Computing Machinery, 2016, 13 (2), pp.1-23.
- Model-based design of correct controllers for dynamically reconfigurable architecturesXin An, Eric Rutten, Jean-Philippe Diguet, Abdoulaye GamatiéACM Transactions on Embedded Computing Systems (TECS), ACM, 2016, 15 (3), pp.#51.
- Cost-Effective Design Strategies for Securing Embedded ProcessorsFlorent Bruguier, Pascal Benoit, Lionel Torres, Lyonel Barthe, Morgan Bourrée, Victor LomnéIEEE Transactions on Emerging Topics in Computing, Institute of Electrical and Electronics Engineers, 2016, 4 (1), pp.60-72.
- Exploring MRAM Technologies for Energy Efficient Systems-On-ChipSophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié, Bruno MussardIEEE Journal on Emerging and Selected Topics in Circuits and Systems, IEEE, 2016, 6 (3), pp.279-292.
- STT-MRAM-Based PUF Architecture exploiting Magnetic Tunnel Junction Fabrication-Induced VariabilityElena Ioana Vatajelu, Giorgio Di Natale, Mario Barbareschi, Lionel Torres, Marco Indaco, Paolo PrinettoACM Journal on Emerging Technologies in Computing Systems, Association for Computing Machinery, 2016, 13 (1). <10.1145/2790302>
2015
- Efficient Embedded Software Migration towards Clusterized Distributed-Memory ArchitecturesRafael Garibotti, Anastasiia Butko, Luciano Ost, Abdoulaye Gamatié, Gilles Sassatelli, Chris Adeniyi-JonesIEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, 2015, 65 (8), pp.2645-2651.
- Disposable configuration of remotely reconfigurable systemsLilian Bossuet, Viktor Fischer, Lubos Gaspar, Lionel Torres, Guy GogniatMicroprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2015, 39 (6), pp.382-392.
- High-level design space exploration for adaptive applications on multiprocessor systems-on-chipXin An, Abdoulaye Gamatié, Eric RuttenJournal of Systems Architecture, Elsevier, 2015, 61 (3-4), pp.172-184.
- Progressive and explicit refinement of scheduling for multidimensional data-flow applications using UML MARTECalin Glitia, Julien Deantoni, Frédéric Mallet, Jean-Vivien Millo, Pierre Boulet, Abdoulaye GamatiéDesign Automation for Embedded Systems, Springer Verlag, 2015, 19 (1-2), pp.1-33.
- Comparative Analysis of MTJ/CMOS Hybrid Cells Based on TAS and In-Plane STT Magnetic Tunnel JunctionsBojan Jovanovic, Raphael Martins Brum, Lionel TorresIEEE Transactions on Magnetics, Institute of Electrical and Electronics Engineers, 2015, 51 (2). <10.1109/TMAG.2014.2347009>
- Automatic Application of Power Analysis CountermeasuresAli Galip Bayrak, Francesco Regazzoni, David Novo, Philip Brisk, François-Xavier Standaert, Paolo IenneIEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, 2015, 64 (2), pp.329-341.
- Vertical and horizontal correlation attacks on RNS-based exponentiationsGuilherme Perin, Laurent Imbert, Philippe Maurine, Lionel TorresJournal of Cryptographic Engineering, Springer, 2015, 5 (3), pp.171-185.
2014
- Evaluation of hybrid MRAM/CMOS cells for “normally-off and instant-on” computingBojan Jovanovic, Raphael Martins Brum, Lionel TorresAnalog Integrated Circuits and Signal Processing, Springer Verlag, 2014, 81 (3), pp.607-621.
- Embedded Memory Hierarchy Exploration Based on Magnetic Random Access MemoryLuís Vitório Cargnini, Lionel Torres, Raphael Martins Brum, Sophiane Senni, Gilles SassatelliJournal of Low Power Electronics and Applications, MDPI, 2014, 4 (3), pp.214-230.
- Voltage scaling and aging effects on soft error rate in SRAM-based FPGAsFernanda Lima Kastensmidt, Jorge Tonfat, Thiago Hanna Both, Paolo Rech, Gilson Wirth, Ricardo da Luz Reis, Florent Bruguier, Pascal Benoit, Lionel Torres, Christopher FrostMicroelectronics Reliability, Elsevier, 2014, 54 (9-10), pp.2344-2348.
- A hybrid magnetic/complementary metal oxide semiconductor three-context memory bit cell for non-volatile circuit designBojan Jovanovic, Raphael Martins Brum, Lionel TorresJournal of Applied Physics, American Institute of Physics, 2014, 115 (13), pp.134316.
International Communications
2021
- Memory Hierarchy Calibration Based on Real Hardware In-order Cores for Accurate SimulationQuentin Huppert, Timon Evenblij, Manu Perumkunnil, Francky Catthoor, Lionel Torres, David NovoDesign, Automation & Test in Europe Conference & Exhibition (DATE), Feb 2021, Virtual, France. <https://www.date-conference.com/>
- GANNoC: A Framework for Automatic Generation of NoC Topologies using Generative Adversarial NetworksMaxime Mirka, Maxime France Pillois, Gilles Sassatelli, Abdoulaye Gamatié13th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO 2021), Jan 2021, Budapest, Hungary. <https://rapidoworkshop.github.io/2021/index.html>
2020
- Mapping Computations in Heterogeneous Multicore Systems with Statistical Regression on InputsJunio da Silva, Lorena Leão, Vinicius Petrucci, Abdoulaye Gamatié, Fernando PereiraBrazilian Symposium on Computing Systems Engineering (SBESC), Nov 2020, Online, Brazil. <https://sbesc.lisha.ufsc.br/sbesc2020/Home>
- Versatile Software Framework for the Monitoring and Control of Distributed Computing SystemsFrancesco Di Gregorio, Etienne Dupuis, Arnaud Castelltort, Gilles Sassatelli, Abdoulaye Gamatié2nd International Conference on Embedded & Distributed Systems (EDiS), Nov 2020, Oran, Algeria. <https://www.univ-oran1.dz/edis2020/>
- Challenges of Using Performance Counters in Security Against Side-Channel LeakageMaria Mushtaq, Pascal Benoit, Umer Farooq5th International Conference on Cyber-Technologies and Cyber-Systems (CYBER 2020), Oct 2020, Nice, France. <https://www.iaria.org/conferences2020/CYBER20.html>
- Efficient AES Implementation for Better Resource Usage and Performance of IoTsUmer Farooq, Maria Mushtaq, Muhammad Bhatti5th International Conference on Cyber-Technologies and Cyber-Systems (CYBER 2020), Oct 2020, Nice, France. <https://www.iaria.org/conferences2020/CYBER20.html>
- SEU Mechanisms in Spintronic Devices: Critical Parameters and Basic EffectsOdilia Coi, Nomena Andrianjohany, Gregory Di Pendina, Lionel Torres, David Dangla, Bernard Diény, Robert EcoffetRADECS 2020, Oct 2020, ONLINE, France.
- Online Learning for Dynamic Control of OpenMP WorkloadsMaxime Mirka, Gilles Sassatelli, Abdoulaye GamatiéInternational Conference on Modern Circuits and Systems Technologies (MOCAST), Sep 2020, Bremen, Germany. <http://www.ids.uni-bremen.de/conf/mocast2020/index.html>
- A Flexible Power Crossbar-based Architecture for Software-Defined Power DomainsFrancesco Di Gregorio, Gilles Sassatelli, Abdoulaye Gamatié, Arnaud CastelltortEPE’20 ECCE Europe, Sep 2020, Lyon (virtual), France. <https://epe-ecce-conferences.com/epe2020/>
- Évaluation de deux architectures matérielles dédiées à l'inférence basée sur des réseaux de neurones convolutifsGuillaume Devic, Abdoulaye Gamatié, Gilles SassatelliConférence francophone d'informatique en Parallélisme, Architecture et Système (Compas'2020), Jun 2020, Lyon, France. <https://2020.compas-conference.fr/>
- Energy-Efficient Machine Learning on FPGA for Edge Devices: a Case StudyGuillaume Devic, Gilles Sassatelli, Abdoulaye GamatiéConférence francophone d'informatique en Parallélisme, Architecture et Système (Compas'2020), Jun 2020, Lyon, France. <https://2020.compas-conference.fr/>
- Wallance, an Alternative to Blockchain for IoTLoïc Dalmasso, Florent Bruguier, Achraf Lamlih, Pascal BenoitIEEE World Forum on Internet of Things 2020 (WF-IOT), Jun 2020, New Orleans, United States.
- Sensitivity Analysis and Compression Opportunities in DNNs Using Weight SharingEtienne Dupuis, David Novo, Ian O'Connor, Alberto Bosio23rd International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Apr 2020, Novi Sad, Serbia. <10.1109/DDECS50862.2020.9095658>
- On the Automatic Exploration of Weight Sharing for Deep Neural Network CompressionEtienne Dupuis, David Novo, Ian O'Connor, Alberto BosioDesign, Automation & Test in Europe Conference & Exhibition (DATE), Mar 2020, Grenoble, France. <10.23919/DATE48585.2020.9116350>
2019
- AMUSE : UN ESCAPE GAME POUR LA SÉCURITÉ NUMÉRIQUEFlorent Bruguier, Loïc Dalmasso, Pascal Benoit, Béatrice PradarelliLes IDEFI : expérimenter, former, pour transformer., Dec 2019, Paris, France.
- Teaching Hardware Security: Earnings of an Introduction proposed as an Escape GameFlorent Bruguier, Emmanuelle Lecointre, Béatrice Pradarelli, Loïc Dalmasso, Pascal Benoit, Lionel TorresInternational Conference on Interactive Collaborative and Blended Learning (ICBL), Nov 2019, Santiago de Cuba, Cuba. <https://onlinelab.space/conference/icbl2019/>
- Self-robust Non-Volatile C-element for Single Event Upset enhanced toleranceOdilia Coi, Lionel Torres, Gregory Di Pendina, Guillaume Prenat30th European Conference on Radiation and its Effects on Components and Systems (RADECS), Sep 2019, Montpellier, France. <https://www.radecs2019.org/>
- Edge-Computing Perspectives with Reconfigurable HardwarePascal Benoit, Loïc Dalmasso, Guillaume Patrigeon, Thierry Gil, Florent Bruguier, Lionel Torres14th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), Jul 2019, York, United Kingdom. <https://www.recosoc.org/>
- Automatic Energy-Efficiency Monitoring of OpenMP WorkloadsMaxime Mirka, Guillaume Devic, Florent Bruguier, Gilles Sassatelli, Abdoulaye GamatiéReCoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jul 2019, York, United Kingdom. <https://www.recosoc.org/>
- FlexNode: a reconfigurable Internet of Things node for design evaluationGuillaume Patrigeon, Paul Leloup, Pascal Benoit, Lionel TorresSAS: Sensors Applications Symposium, Mar 2019, Sophia Antipolis, France. <http://2019.sensorapps.org>
- Compiler-assisted adaptive program scheduling in big.LITTLE systemsMarcelo Novaes, Vinicius Petrucci, Abdoulaye Gamatié, Fernando Magno Quintão PereiraPPoPP: Principles and Practice of Parallel Programming, Feb 2019, Washington, United States. pp.429-430.
2018
- Energy-Efficient Memory Mappings based on Partial WCET Analysis and Multi-Retention Time STT-RAMRabab Bouziane, Erven Rohou, Abdoulaye GamatiéRTNS: Real-Time Networks and Systems, Oct 2018, Poitiers, France. pp.148-158.
- From Spintronic Devices to Hybrid CMOS/Magnetic System On ChipSophiane Senni, Frédéric Ouattara, Guillaume Patrigeon, Pascal Benoit, Pascal Nouet, Lionel Torres, François Duhem, Gregory Di Pendina, Guillaume PrenatVLSI-SoC: Very Large Scale Integration - System-on-Chip, Oct 2018, Verona, Italy. pp.188-191.
- Evaluation of Heterogeneous Multicore Cluster Architectures Designed for Mobile ComputingDavid Novo, Alejandro Nocua, Florent Bruguier, Abdoulaye Gamatié, Gilles SassatelliReCoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jul 2018, Lille, France. <10.1109/ReCoSoC.2018.8449376>
- A Compiler-Centric Infra-Structure for Whole-Board Energy Measurement on Heterogeneous Android SystemsJunio Cezar Ribeiro da Silva, Fernando Magno Quinto Pereira, Michael Frank, Abdoulaye GamatiéReCoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jul 2018, Lille, France. <10.1109/ReCoSoC.2018.8449378>
- A Robust Dual Reference Computing-in-Memory Implementation and Design Space Exploration Within STT-MRAMLiuyang Zhang, Wang Kang, Hao Cai, Peng Ouyang, Lionel Torres, Youguang Zhang, Aida Todri-Sanial, Weisheng ZhaoISVLSI: International Symposium on Very Large Scale Integration, Jul 2018, Hong Kong, China. pp.275-280.
- FPGA-based platform for fast accurate evaluation of Ultra Low Power SoCGuillaume Patrigeon, Pascal Benoit, Lionel TorresPATMOS: Power and Timing Modeling, Optimization and Simulation, Jul 2018, Platja d'Aro, Spain. pp.123-128.
- FPGA Implementation of Pattern Matching for Industrial Control SystemsPeter Rouget, Benoit Badrignans, Pascal Benoit, Lionel TorresIPDPSW: International Parallel and Distributed Processing Symposium Workshops, May 2018, Vancouver, Canada. pp.210-213.
- Improving the Performance of STT-MRAM LLC through Enhanced Cache Replacement PolicyPierre-Yves Péneau, David Novo, Florent Bruguier, Lionel Torres, Gilles Sassatelli, Abdoulaye GamatiéARCS: Architecture of Computing Systems, Apr 2018, Braunschweig, Germany. pp.168-180.
- Main memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworksManu Komalan, Oh Hyung Rock, Matthias Hartmann, Sushil Sakhare, Christian Tenllado, José Ignacio Gómez, Gouri Sankar Kar, Arnaud Furnemont, Francky Catthoor, Sophiane Senni, David Novo, Abdoulaye Gamatié, Lionel TorresDATE: Design, Automation and Test in Europe, Mar 2018, Dresden, Germany. pp.103-108.
- Using multifunctional standardized stack as universal spintronic technology for IoTMehdi B. Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Abdoulaye Gamatié, Pascal Nouet, Frédéric Ouattara, Gilles Sassatelli, Kotb Jabeur, Pierre Vanhauwaert, Alexandru Atitoaie, Ioana Firastrau, G. Di Pendina, Guillaune PrenatDATE: Design, Automation and Test in Europe, Mar 2018, Dresden, Germany. pp.931-936.
- Compile-Time Silent-Store Elimination for Energy Efficiency: an Analytic Evaluation for Non-Volatile Cache MemoryRabab Bouziane, Erven Rohou, Abdoulaye GamatiéRAPIDO: Rapid Simulation and Performance Evaluation, HiPEAC, Jan 2018, Manchester, United Kingdom. pp.1-8.
2017
- Performance and Energy Assessment of Last-Level Cache Replacement PoliciesPierre-Yves Péneau, David Novo, Florent Bruguier, Gilles Sassatelli, Abdoulaye GamatiéEDiS: Embedded and Distributed Systems, Dec 2017, Oran, Algeria. <10.1109/EDIS.2017.8284032>
- How Could Compile-Time Program Analysis help Leveraging Emerging NVM Features?Rabab Bouziane, Erven Rohou, Abdoulaye GamatiéEDiS: Embedded and Distributed Systems, Dec 2017, Oran, Algeria. pp.1-6.
- Distributed and Dynamic Shared-Buffer Router for High-Performance InterconnectCharles Effiong, Gilles Sassatelli, Abdoulaye GamatiéNOCS: Networks-on-Chip Symposium, Oct 2017, Seoul, South Korea. pp.1-8.
- LTE-M adaptive eNodeB for emergency scenariosAhmad Hani El Fawal, Ali Mansour, Mohamad Najem, Frédéric Le Roy, Denis Le JeuneICTC: Information and Communication Technology Convergence, Oct 2017, Jeju Island, South Korea. <10.1109/ICTC.2017.8191035>
- Scalable and Power-Efficient Implementation of an Asynchronous Router with Buffer SharingCharles Effiong, Gilles Sassatelli, Abdoulaye GamatiéDSD: Digital System Design, Aug 2017, Vienna, Australia. pp.171-178.
- A novel SRAM -STT-MRAM hybrid cache implementation improving cache performanceOdilia Coi, Guillaume Patrigeon, Sophiane Senni, Lionel Torres, Pascal BenoitNANOARCH: Nanoscale Architectures, Jul 2017, Newport, United States. pp.39-44.
- ElasticSimMATE: a Fast and Accurate gem5 Trace-Driven Simulator for Multicore SystemsAlejandro Nocua, Florent Bruguier, Gilles Sassatelli, Abdoulaye GamatiéReCoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jul 2017, Madrid, Spain. <10.1109/ReCoSoC.2017.8016146>
- SecBoot — lightweight secure boot mechanism for Linux-based embedded systems on FPGAsPeter Rouget, Benoit Badrignans, Pascal Benoit, Lionel TorresReCoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jul 2017, Madrid, Spain. pp.1-5.
- GREAT: HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional Standardized sTackMehdi B. Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Pascal Nouet, Rui Ma, Martin Kreißig, Frank Ellinger, Kotb Jabeur, Pierre Vanhauwaert, Gregory Di Pendina, Guillaune PrenatISVLSI: International Symposium on Very Large Scale Integration, Jul 2017, Bochum, Germany. pp.344-349.
- Roundabout: A Network-on-Chip router with adaptive buffer sharingCharles Effiong, Gilles Sassatelli, Abdoulaye GamatiéNEWCAS: New Circuits and Systems Conference, Jun 2017, Strasbourg, France. pp.65-68.
- Efficient Programming for Multicore Processor Heterogeneity: OpenMP versus OmpSsAnastasiia Butko, Florent Bruguier, Abdoulaye Gamatié, Gilles SassatelliOpenSuCo, Jun 2017, Frankfurt, Germany. <http://www.opensuco.community/2017/01/30/opensuco-1/>
- MAGPIE: System-level Evaluation of Manycore Systems with Emerging Memory TechnologiesThibaud Delobelle, Pierre-Yves Péneau, Abdoulaye Gamatié, Florent Bruguier, Sophiane Senni, Gilles Sassatelli, Lionel TorresEMS: Emerging Memory Solutions, Mar 2017, Lausanne, Switzerland.
- Embedded systems to high performance computing using STT-MRAMSophiane Senni, Thibaud Delobelle, Odilia Coi, Pierre-Yves Péneau, Lionel Torres, Abdoulaye Gamatié, Pascal Benoit, Gilles SassatelliDATE: Design, Automation and Test in Europe, Mar 2017, Lausanne, Switzerland. pp.536-541.
2016
- Embedded Hardware and IoT SecurityLionel TorresSymposium on Emerging Trends in Computing, Oct 2016, Montreux, Switzerland.
- Full-System Simulation of big.LITTLE Multicore Architecture for Performance and Energy ExplorationAnastasiia Butko, Florent Bruguier, Abdoulaye Gamatié, Gilles Sassatelli, David Novo, Lionel Torres, Michel RobertMCSoC: Embedded Multicore/Many-core Systems-on-Chip, Sep 2016, Lyon, France. pp.201-208.
- Exploiting Large Memory using 32-bit Energy-Efficient Manycore ArchitecturesMohamed Lamine Karaoui, Pierre-Yves Péneau, Quentin L. Meunier, Franck Wajsbürt, Alain GreinerMCSoC: Many-core Systems-on-Chip, Sep 2016, Lyon, France. pp.61-68.
- Loop Optimization in Presence of STT-MRAM Caches: a Study of Performance-Energy TradeoffsPierre-Yves Péneau, Rabab Bouziane, Abdoulaye Gamatié, Erven Rohou, Florent Bruguier, Gilles Sassatelli, Lionel Torres, Sophiane SenniPATMOS: Power and Timing Modeling, Optimization and Simulation, Sep 2016, Bremen, Germany. pp.162-169.
- Performance Prediction of Application Mapping in Manycore Systems with Artificial Neural NetworksAbdoulaye Gamatié, Roman Ursu, Manuel Selva, Gilles SassatelliMCSoC: Embedded Multicore/Many-core Systems-on-Chip, Sep 2016, Lyon, France. pp.185-192.
- An SEU Tolerant MRAM based non-volatile asynchronous circuit designJeremy Lopes, Gregory Dipendina, Edith Beigné, Lionel TorresRADECS: Radiation and its Effects on Components and Systems, Sep 2016, Bremen, Germany. <10.1109/RADECS.2016.8093151>
- Speed and Accuracy Dilemma in NoC Simulation: What about Memory Impact?Manuel Selva, Abdoulaye Gamatié, David Novo, Gilles SassatelliReCoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jun 2016, Tallinn, Estonia.
- Quantitative evaluation of reliability and performance for STT-MRAMLiuyang Zhang, Aida Todri-Sanial, Wang Kang, Youguang Zhang, Lionel Torres, Yuanqing Cheng, Weisheng ZhaoISCAS: International Symposium on Circuits and Systems, May 2016, Montréal, QC, Canada. pp.1150-1153.
- Hardware security: From concept to applicationFlorent Bruguier, Pascal Benoit, Lionel Torres, Lilian BossuetEWME: European Workshop on Microelectronics Education, May 2016, Southampton, United Kingdom. <10.1109/EWME.2016.7496483>
- Reliability and performance evaluation for STT-MRAM under temperature variationLiuyang Zhang, Yuanqing Cheng, Wang Kang, Youguang Zhang, Lionel Torres, Weisheng Zhao, Aida Todri-SanialEuroSimE: Thermal, Mechanical and Multi-Physics Simulation and Experiments in Microelectronics and Microsystems, Apr 2016, Montpellier, France. <10.1109/EuroSimE.2016.7463380>
- Correlative electromagnetic analysis on an AES cryptoprocessorFlorent BruguierTraining School on Trustworthy Manufacturing and Utilization of Secure Devices, Apr 2016, Leukerbad, Switzerland.
- A Workflow for Fast Evaluation of Mapping Heuristics Targeting Cloud InfrastructuresRoman Ursu, Khalid Latif, David Novo, Manuel Selva, Abdoulaye Gamatié, Gilles Sassatelli, Dmitry Khabi, Alexey CheptsovDREAMCloud: Dynamic Resource Allocation and Management in Embedded, High Performance and Cloud Computing, Jan 2016, Prague, Czech Republic.
- Design space exploration for complex automotive applications: an engine control system case studyKhalid Latif, Manuel Selva, Charles Effiong, Roman Ursu, Abdoulaye Gamatié, Gilles Sassatelli, Leonardo B. Zordan, Luciano Ost, Piotr Dziurzanski, Leandro Soares IndrusiakRAPIDO: Rapid Simulation and Performance Evaluation, Jan 2016, Prague, Czech Republic. <10.1145/2852339.2852341>
- Position Paper: OpenMP scheduling on ARM big.LITTLE architectureAnastasiia Butko, Louisa Bessad, David Novo, Florent Bruguier, Abdoulaye Gamatié, Gilles Sassatelli, Lionel Torres, Michel RobertMULTIPROG: Programmability and Architectures for Heterogeneous Multicores, Jan 2016, Prague, Czech Republic. <http://research.ac.upc.edu/multiprog/multiprog2016/>
- Processor Architecture Based on MRAM, from embedded systems to high performance computingLionel Torres7th MRAM Global Innovation Forum 2016, 2016, Zurich, Switzerland.
2015
- For a Design Continuum to Build Next Generation Energy-Efficient Compute NodesAbdoulaye GamatiéEDiS: Embedded and Distributed Systems, Nov 2015, Oran, Algeria.
- Adaptive Power monitoring for self-aware embedded systemsMohamad El Ahmad, Mohamad Najem, Pascal Benoit, Gilles Sassatelli, Lionel TorresNORCAS: Nordic Circuits and Systems Conference, Oct 2015, Oslo, Norway. <10.1109/NORCHIP.2015.7364364>
- An Integrated Framework for Model-Based Design and Analysis of Automotive Multi-Core SystemsKhalid Latif, Charles Effiong, Abdoulaye Gamatié, Gilles Sassatelli, Leonardo B. Zordan, Luciano Ost, Piotr Dziurzanski, Leandro Soares IndrusiakFDL: Forum on specification & Design Languages, Sep 2015, Barcelona, Spain. <http://ecsi.org/fdl2015>
- A Distributed Energy-aware Task Mapping to Achieve Thermal Balancing and Improve Reliability of Many-core SystemsMarcelo Mandelli, Guilherme Castilhos, Gilles Sassatelli, Luciano Ost, Fernando MoraesSBCCI: Symposium on Integrated Circuits and Systems Design, Aug 2015, Salvador de Bahia, Brazil. <10.1145/2800986.2800992>
- Emerging Non-volatile Memory Technologies Exploration Flow for Processor ArchitectureSophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié, Bruno MussardISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.460-465.
- Design Exploration for next Generation High-Performance Manycore On-chip Systems: Application to big.LITTLE ArchitecturesAnastasiia Butko, Abdoulaye Gamatié, Gilles Sassatelli, Lionel Torres, Michel RobertISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.551-556.
- On the Performance Exploration of 3D NoCs with Resistive-Open TSVsCharles Effiong, Vianney Lapotre, Abdoulaye Gamatié, Gilles Sassatelli, Aida Todri-Sanial, Khalid LatifISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.579-584.
- Implementation of AES Using NVM Memories Based on Comparison FunctionJérémie Clément, Bruno Mussard, David Naccache, Lionel TorresISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.356-361.
- Digital Right Management for IP ProtectionJerome Rampon, Renaud Perillat, Lionel Torres, Pascal Benoit, Giorgio Di Natale, Mario BarbareschiISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.200-203.
- Radiative Effects on MRAM-Based Non-Volatile Elementary StructuresJeremy Lopes, Gregory Di Pendina, Eldar Zianbetov, Edith Beigné, Lionel TorresISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.321-326.
- STT-MRAM-Based Strong PUF ArchitectureElena Ioana Vatajelu, Giorgio Di Natale, Lionel Torres, Paolo PrinettoISVLSI: International Symposium on Very Large Scale Integration, Jul 2015, Montpellier, France. pp.467-472.
- A survey on security features in modern FPGAsRémy Druyer, Lionel Torres, Pascal BenoitReCoSoC: Reconfigurable Communication-centric Systems-on-Chip, Jun 2015, Brême, Germany. <10.1109/ReCoSoC.2015.7238102>
- An architecture-level cache simulation framework supporting advanced PMA STT-MRAMBi Wu, Yuanqing Cheng, Ying Wang, Aida Todri-Sanial, Guangyu Sun, Lionel Torres, Weisheng ZhaoNANOARCH: Nanoscale Architectures, Jun 2015, Boston, MA, United States. pp.7-12.
- Asynchronous Design for Harsh EnvironmentsJeremy Lopes, Gregory Di Pendina, Edith Beigné, Lionel TorresASYNC: Asynchronous Circuits and Systems, May 2015, Montain View, CA, United States. <http://ee.usc.edu/async2015/>
- Software testing and software fault injectionMaha Kooli, Alberto Bosio, Pascal Benoit, Lionel TorresDTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2015, Naples, Italy. <10.1109/DTIS.2015.7127370>
- Ring Oscillators Analysis for FPGA Security PurposesMario Barbareschi, Giorgio Di Natale, Florent Bruguier, Pascal Benoit, Lionel TorresTRUDEVICE, Mar 2015, Grenoble, France.
- Potential Applications Based on NVM Emerging TechnologiesSophiane Senni, Lionel Torres, Gilles Sassatelli, Abdoulaye Gamatié, Bruno MussardDATE: Design, Automation and Test in Europe, Mar 2015, Grenoble, France. pp.1012-1017.
- Trading-off System Load and Communication in Mapping Heuristics for Improving NoC-Based MPSoCs ReliabilityMarcelo Mandelli, Luciano Ost, Gilles Sassatelli, Fernando MoraesISQED: International Symposium on Quality Electronic Design, Mar 2015, Santa Clara, United States. pp.392-396.
- Discrete Control-Based Design of Adaptive and Autonomic Computing SystemsXin An, Gwenaël Delaval, Jean-Philippe Diguet, Abdoulaye Gamatié, Soguy Mak-Karé Gueye, Hervé Marchand, Noel de Palma, Eric RuttenICDCIT: International Conference on Distributed Computing and Internet Technology, Feb 2015, Bhubaneswar, India. <10.1007/978-3-319-14977-6_6>
- A trace-driven approach for fast and accurate simulation of manycore architecturesAnastasiia Butko, Rafael Garibotti, Luciano Ost, Chris Adeniyi-Jones, Vianney Lapotre, Abdoulaye Gamatié, Gilles SassatelliASP-DAC: Asia and South Pacific Design Automation Conference, Jan 2015, Chiba, Tokyo, Japan. pp.707-712.
- Performance of a Smartphone based Star TrackerAndrey Khorev, Lionel Torres, Eric NativeliCubeSat: Interplanetary CubeSat, 2015, Londres, United Kingdom.
2014
- Analysing the Impact of Aging and Voltage Scaling under Neutron-induced Soft Error Rate in SRAM-based FPGAsFernanda Lima Kastensmidt, Tonfat Jorge, Thiago Both, Paolo Rech, Gilson Wirth, Ricardo da Luz Reis, Florent Bruguier, Pascal Benoit, Lionel Torres, Christopher FrostESREF: European Symposium on Reliability of Electron devices, Failure physics and analysis, Sep 2014, Berlin, Germany.
- Method for dynamic power monitoring on FPGAsMohamad Najem, Pascal Benoit, Florent Bruguier, Gilles Sassatelli, Lionel TorresFPL: Field Programmable Logic and Applications, Sep 2014, Munich, Germany. <10.1109/FPL.2014.6927457>
- Aging effects in FPGAs: an experimental analysisAbdulazim Amouri, Florent Bruguier, Saman Kiamehr, Pascal Benoit, Lionel Torres, Mehdi B. TahooriFPL: Field Programmable Logic and Applications, Sep 2014, Munich, Germany. <10.1109/FPL.2014.6927390>
- Performance exploration of partially connected 3D NoCs under manufacturing variabilityAnelise Kologeski, Fernanda Lima Kastensmidt, Vianney Lapotre, Abdoulaye Gamatié, Gilles Sassatelli, Aida Todri-SanialNEWCAS: New Circuits and Systems, Jun 2014, Trois-Rivieres, QC, Canada. pp.61-64.
- Power management through DVFS and dynamic body biasing in FD-SOI circuitsYeter Akgul, Diego Puschini, Suzanne Lesecq, Edith Beigné, Ivan Miro-Panades, Pascal Benoit, Lionel TorresDAC: Design Automation Conference, Jun 2014, San Francisco, United States. pp.1-6.
- Power efficient Thermally Assisted Switching Magnetic memory based memory systemsSophiane Senni, Lionel Torres, Gilles Sassatelli, Anastasiia Butko, Bruno MussardReCoSoC: Reconfigurable and Communication-Centric Systems-on-Chip, May 2014, Montpellier, France. <10.1109/ReCoSoC.2014.6861357>
- Fault injection tools based on Virtual MachinesMaha Kooli, Giorgio Di Natale, Pascal Benoit, Alberto Bosio, Lionel Torres, Volkmar SiehReCoSoC: Reconfigurable and Communication-Centric Systems-on-Chip, May 2014, Montpellier, France. <10.1109/ReCoSoC.2014.6861351>
- Aging and voltage scaling impacts under neutron-induced soft error rate in SRAM-based FPGAsFernanda Lima Kastensmidt, Jorge Tonfat, Thiago Both, Paolo Rech, Gilson Wirth, Ricardo Reis, Florent Bruguier, Pascal Benoit, Lionel Torres, Christopher FrostETS: European Test Symposium, May 2014, Paderborn, Germany. <10.1109/ETS.2014.6847845>
- Attacking Randomized Exponentiations Using Unsupervised LearningGuilherme Perin, Laurent Imbert, Lionel Torres, Philippe MaurineCOSADE: Constructive Side-Channel Analysis and Secure Design, Apr 2014, Paris, France. pp.144-160.
Last update on 07/02/2019
Department : Microélectronique
Head : Gilles SASSATELLI