The SmartIES team, which stands for “Smart Integrated Electronic Systems,” consists of approximately 30 researchers (11 full-time staff) whose work focuses on the design, analysis, and modeling of integrated devices and systems developed using CMOS, CMOS-compatible (MRAM), or next-generation technologies (CNT, CNTFET) and incorporating innovative functionalities, devices, and concepts (AI, smart sensors, physical intrusion detection). Improving energy efficiency and physical security without compromising service quality are the primary objectives of our work. Data processing methods, whether embedded or not, are thus at the heart of our focus for a wide range of applications (environment, life sciences, security, etc.).
SmartIES is characterized by a commitment to conducting research spanning from theoretical concepts to the development of demonstrators or measurement benches, hardware and software platforms, and their deployment in realistic application contexts.
In recent years, we have seen numerous projects that have led to tangible outcomes (ASICs, dedicated experimental platforms, hardware and/or software prototypes) and contributed to technology transfer.
Nadine Azémard-Crestani, Chargé de recherche, CNRS
Mariane Comte, Maître de conférences, UM
Frédérick Mailly, Maître de conférences, UM
Vincent Kerzerho, Chargé de recherche, CNRS
Serge Bernard, Directeur de recherche, CNRS
Guy Cathebras, Professeur des universités, UM
Fabien Soulier, Maître de conférences, UM
Pascal Nouet, Professeur des universités, UM
Florence Azaïs, Chargé de recherche, CNRS
Laurent Latorre, Professeur des universités, UM
Antoine Landreau, CNRS
Thomas Chevrier, SAS COOOL
Quentin Ponzo, UM
Hugo Blayes, Doctorant externe, CNRS
Jason Cerisier, CDD Ingénieur-Technicien, CNRS
Mohan Julien, CDD Ingénieur-Technicien, CNRS
Ana Tacuri, CDD Ingénieur-Technicien, CNRS
Hypolite Le Nabat, CDD Ingénieur-Technicien, CNRS
Geoffrey Chancel, CDD Chercheur, CNRS
Fathi Ben Ali, CDD Ingénieur-Technicien, CNRS
Sarah Belgaid, CDD Chercheur, UM
Jacques Benoit, CDD Ingénieur-Technicien, CNRS
Alexandre Boyer, CDD Ingénieur-Technicien, CNRS
Amaury Boguais, CDD Ingénieur-Technicien, CNRS
Thomas Falanga, CDD Chercheur, UM
Vincent Serantoni, CDD Ingénieur-Technicien, UM
Koji Andriamahery, CDD Ingénieur-Technicien, AxLR
Keywords: data acquisition & fusion, signal processing, life and environmental monitoring, biosensors, bioimpedance, MEMS/NEMS.
SmartIES develops sensors and the integrated electronics required for their operation for both specific and general-purpose applications.
Specific systems have thus been developed for:
- measuring bioelectrical signals (peripheral nervous system),
- measuring intraocular pressure (glaucoma diagnosis or prevention),
- broadband bioimpedance spectroscopy (body fat percentage, tissue condition, vitellogenesis, and swimming speed in fish),
- CNT-FET-based biosensors (cancer-related enzymatic activity).
A three-axis thermal accelerometer based on a CMOS manufacturing process and offering excellent performance was also recently proposed as part of a joint PhD supervision project with the University of Sfax (Tunisia).
Generic interfaces for resistive, capacitive, or field-effect sensors are also being developed for transducer conditioning and analog-to-digital signal conversion. Based in particular on a patent from the current-recycling amplifier laboratory and SD-type architectures, these interfaces are compact, robust, adaptive, low-power, and located as close as possible to the sensor. Other, more specialized interfaces have been proposed to replace laser abrasion calibration in high-end resistive sensors.
SmartIES also designs geolocated, networked multisensor systems. Target applications include aquatic species (tuna, marlin, turtles) for measuring physiological parameters, and terrestrial species (elephants, lions, zebras) for audio recordings intended for ecologists.
Finally, as the cost of sensors continues to decline, enabling the design of systems with massive redundancy, SmartIES is developing data fusion algorithms based on neural networks, complementary filtering, or dynamic weighting to improve the resolution, fault tolerance, and robustness of these measurement systems.
Keywords: side-channel attacks, fault-injection attacks, circuit integrity and authenticity, machine learning-based signal processing and countermeasures, mathematical proofs.
The work of smartIES focuses on improving the security of embedded devices (from microcontrollers to SoCs) against hardware attacks such as side-channel attacks or fault injection attacks. Thus, all algorithmic, mathematical, and physical methods are considered to increase the resilience of information systems.
Similarly, threats to the integrity and authenticity of embedded devices are a major concern for the team, given the risks posed by counterfeiting and the insertion of Trojan horses.
SmartIES’ expertise in the field of security is reflected in its know-how and knowledge in the following areas:
Masking and security proofs of masking,
Design and characterization of secure circuits and systems capable of withstanding attacks (SCA and IF) carried out for the purpose of denial of service or secret extraction,
Modeling of electromagnetic emissions and leakage from integrated circuits,
Impact of electromagnetic pulses on secure ICs,
Improvement of CAD workflows for the design of secure ICs,
Detection of hardware Trojans and counterfeits.
Keywords: 3D integration, carbon nanotubes, MRAM, sensors, biosensors, advanced analog design, adaptive circuits and systems, statistical design methods, low-power design.
SmartIES evaluates, prior to their industrial availability, the potential of new technological nodes and materials that could advantageously replace silicon in the design of tomorrow’s integrated circuits.
First and foremost, carbon nanotubes—one-dimensional (1D) materials—are emerging as a promising solution for the design of ultra-low-power ICs. Other alternatives include two-dimensional (2D) materials (graphene, MoS2, etc.) as well as vertical stacks of different 2D materials forming Van der Waals heterostructures. This research finds applications in the design of biosensors with 1D/2D field-effect components.
Second, spintronic memories, such as STT or SOT MRAM, are being explored as credible alternatives to state-of-the-art industrial non-volatile memories. SmartIES’ contributions focus on structural and electrical aspects, notably including contributions based on current-recycling read amplifiers—for which a patent has been filed—and electrical simulation methods for MRAM-type memories within a heterogeneous integrated circuit design flow.
Second, spintronic memories, such as STT or SOT MRAM, are being explored as credible alternatives to state-of-the-art industrial non-volatile memories. SmartIES’ contributions focus on structural and electrical aspects, notably including contributions based on current-recycling read amplifiers—for which a patent has been filed—and electrical simulation methods for MRAM-type memories within a heterogeneous integrated circuit design flow.
All of this work draws on SmartIES’s expertise in electrical modeling and the design of analog and mixed-signal integrated circuits, taking into account the effects of variations in manufacturing processes.