The SmartIES team, “Smart Integrated Electronic Systems”, is a team of around 30 researchers (11 permanent staff) whose activities focus on the design, analysis and modeling of integrated devices and systems based on CMOS, CMOS-compatible (MRAM) or future technologies (CNT, CNTFET), and incorporating innovative functionalities, devices and concepts (AI, intelligent sensors, hardware intrusion detection). Improving energy efficiency and hardware security, without degrading services, are the major objectives of our work. Embedded and non-embedded data processing methods are thus at the heart of our concerns for a wide range of applications (environment, life, security, etc.).
SmartIES is characterized by its determination to conduct research work from theoretical concepts to the development of demonstrators or measurement benches, hardware and software platforms, and their deployment in realistic application contexts.
In recent years, a great deal of work has led to the development of hardware (ASICs, dedicated experimental platforms, hardware and/or software prototypes) and contributed to technology transfer.
Staff
Nadine Azémard-Crestani, Chargé de recherche, CNRS
Jean-Marc Galliere, Maître de conférences, UM
Frédérick Mailly, Maître de conférences, UM
Vincent Kerzerho, Chargé de recherche, CNRS
Serge Bernard, Directeur de recherche, CNRS
Guy Cathebras, Professeur des universités, UM
Fabien Soulier, Maître de conférences, UM
Philippe Maurine, Professeur des universités, UM
Pascal Nouet, Professeur des universités, UM
Loic Masure, Chargé de recherche, CNRS
Laurent Latorre, Professeur des universités, UM
Loïc Demange, Maître de conférences, UM
Associates and Students
Antoine Landreau, CNRS
Anselme Mouette, UM
Stephane Pitou, CNRS
Thomas Chevrier, SAS COOOL
Quentin Ponzo, UM
Thomas Falanga, UM
Sara Sahraee, UM
Ziling Liao, CNRS
Abdoul Aziz Ndiaye, SERMA Group
Nathan Rousselot, THALES
Regular Co-workers
Jason Cerisier, CDD Ingénieur-Technicien, CNRS
Thibaut Pelliccia, CDD Ingénieur-Technicien, CNRS
Ana Tacuri, CDD Ingénieur-Technicien, CNRS
Geoffrey Chancel, CDD Chercheur, CNRS
Fathi Ben Ali, CDD Ingénieur-Technicien, AxLR
Sarah Belgaid, CDD Chercheur, UM
Jacques Benoit, CDD Ingénieur-Technicien, CNRS
Amaury Boguais, CDD Ingénieur-Technicien, CNRS
Vincent Serantoni, CDD Ingénieur-Technicien, UM
Koji Andriamahery, CDD Ingénieur-Technicien, AxLR
Keywords: data acquisition & fusion, signal processing, life and environmental observation, biosensors, bioimpedance, MEMS/NEMS.
SmartIES develops sensors and the integrated electronics required to operate them, for specific or generic applications.
Specific systems have been developed for :
- measurement of bioelectrical signals (peripheral nervous system),
- intraocular pressure measurement (glaucoma diagnosis or prevention),
- broadband bioimpedance spectroscopy (fat content, tissue condition, vitellogenesis and swimming speed in fish),
- CNT-FET-based biosensors (cancer-related enzymatic activity).
A three-axis thermal accelerometer based on a CMOS manufacturing process, and offering excellent performance, was also recently proposed as part of a joint thesis with the University of Sfax (Tunisia).
Generic interfaces for resistive, capacitive or field-effect sensors are also being developed for transducer conditioning and analog-to-digital signal conversion. Based in particular on a laboratory patent for current recycling amplifiers and SD-type architectures, they are compact, robust, adaptive, low-power and as close as possible to the sensor. Other, more specific interfaces have been proposed to replace laser abrasion calibration in high-end resistive sensors.
Finally, SmartIES designs geo-located, communicating multi-sensor systems. Target applications include aquatic species (tuna, marlin, turtles) for physiological parameter measurements, and terrestrial species (elephants, lions, zebras) for audio recordings for ecologists.
Finally, as the ever-decreasing cost of sensors makes it possible to design systems with massive redundancy, SmartIES is developing data fusion algorithms based on neural networks, complementary filtering or dynamic weighting to improve the resolution, fault tolerance and robustness of these measurement systems.
Keywords: covert channel attacks, fault injection attacks, circuit integrity and authenticity, machine learning signal processing and countermeasures, mathematical proofs.
smartIES’ work focuses on improving the security of integrated devices (from microcontrollers to SoCs) against hardware attacks such as co-channel and fault injection attacks. All the algorithmic, mathematical and physical means are considered to increase the resilience of information systems.
Similarly, threats to the integrity and authenticity of embedded objects are a primary concern for the team, in the face of threats such as counterfeiting and Trojan horse insertion.
SmartIES’ expertise in the field of security is reflected in its know-how in the following areas:
- Masking and proof of masking security,
- Design and characterization of secure circuits and systems capable of withstanding attacks (SCA and by IF) conducted for the purposes of denial of service or secret extraction,
- Modeling of electromagnetic emissions and leakage from integrated circuits,
- Impact of electromagnetic pulses on secure ICs,
- Improvement of CAD flows for secure IC design,
- Detection of hardware Trojans and counterfeits.
Keywords: 3D integration, carbon nanotubes, MRAM, sensors, biosensors, advanced analog design, adaptive circuits and systems, statistical design methods, low-power design.
SmartIES evaluates, in advance of their industrial availability, the interest of new technological nodes and new materials that can advantageously replace silicon in the design of tomorrow’s Integrated Circuits.
In the first instance, carbon nanotubes, a one-dimensional (1D) material, are emerging as a promising solution for the design of ultra-low-power ICs. Other alternatives include two-dimensional materials (graphene, MoS2, etc.) and vertical stacks of different 2D materials forming Van Der Waals heterostructures. This work has applications for the design of biosensors with 1D/2D field-effect components.
Secondly, spintronic memories, such as STT or SOT MRAM, are explored as credible alternatives to the non-volatile memories of the industrial state-of-the-art. SmartIES’ contributions focus on the structural and electrical levels, with contributions based on patent-pending current-recycling sense amplifiers and electrical simulation methods for MRAM-type memories in a heterogeneous IC design flow.
In this quest for energy efficiency, SmartIES is also exploring, in collaboration with the ADAC team for systems aspects, SRAM-type volatile memories in advanced or very advanced technologies, and 3D stacking integration paths that should enable very high density at low cost. Work on memories benefits from a long-term collaboration with a leading European partner in research into tomorrow’s technologies.
All this work draws on SmartIES’ expertise in electrical modeling and the design of analog and mixed-signal integrated circuits, taking into account the effects of variations in manufacturing processes.
curlGET failed, http-code: 502