Menu Close

ADAC Team: ADAptive Computing

David NOVO
David NOVO
Head

ADAC Team

ADAptive Computing

The ADAC team (ADAptive Computing) within the Microelectronics Department aims to design computing architectures and systems that are intelligent, secure, high-performing, and environmentally responsible. Among the key scientific challenges addressed, ADAC focuses on optimizing AI within architectures to maximize performance while reducing energy consumption. The team also investigates how emerging technologies can contribute to the energy efficiency of computing systems, evaluates architectural solutions to protect systems against emerging threats, and seeks to design systems that meet sustainability requirements and reduce carbon footprint.

ADAC is actively involved in national exploratory research programs (PEPR) in Artificial Intelligence, Cybersecurity, and Electronics. The team also maintains strong partnerships with leading European institutions such as IMEC and participates in ambitious projects like GENESIS, which focuses on energy sobriety.

Staff
Abdoulaye Gamatié, Directeur de recherche, CNRS
Florent Bruguier, Maître de conférences, UM
William Pensec, Maître de conférences, UM
Gilles Sassatelli, Directeur de recherche, CNRS
Lionel Torres, Professeur des universités, UM
Pascal Benoit, Professeur des universités, UM
David Novo, Directeur de recherche, CNRS
Michel Robert, Professeur des universités, UM


Associates and Students
Mohammadali Zoroufchian, UM
Justin Chikhaoui, CNRS
Ismael Samaye, UM
Johann Teissier, UM
Felipe Paiva Alencar, UM
Enzo Rafinesque, UM
Soraya Mobaraki, CNRS
Clement Brichart, CEA
Bruno Lovison Franco, UM
Ali Ait Hassou, UM
Gabriel Hautreux, CINES
Victor Cook, CNRS
Mohamed Watfa, CNRS


Regular Co-workers
Ana Tacuri, CDD Ingénieur-Technicien, CNRS
Aymen Romdhane, Doctorant externe, CEA
Luis Bertran Alvarez, CDD Chercheur, CNRS

Regular Contributors
Michel Robert, Professeur des Universités, Directeur du CINES

The ADAC group conducts research on 3 main scientific directions, as follows:

Topic 1. Architectures and Tools for Hardware Acceleration

Research in this topic aims to enhance the performance of high-performance computing (HPC), artificial intelligence (AI), and edge computing. It focuses on interconnect optimization, specialization of compute units, and the integration of emerging memory technologies.

Network-on-Chip (NoC) architectures are explored using machine learning techniques to improve communication between processing units while maintaining flexibility. Simulation tools are extended, notably gem5, and calibrated using microbenchmark-based methodologies. FPGA-based acceleration is used to overcome the limitations of traditional simulation approaches, with simplified interfaces that do not require RTL design expertise (ANR F3CAS project, in collaboration with ETHZ).

Compute unit specialization is addressed through performance and energy profiling of AI tasks on GPUs. A RISC-V-based architecture with dedicated accelerators is proposed to combine algorithmic flexibility with hardware efficiency.

Emerging memory technologies such as MRAM are investigated through architecture-technology co-optimization. A collaboration with IMEC focuses on designing on-chip SRAM cache memories using advanced 3D monolithic integration.

Topic 2. Security, Reliability and Resilience: Towards Trustworthy Computing Systems

This research topic focuses on strengthening the security of embedded systems operating in constrained and hostile environments, particularly within the context of Edge Computing. Work addresses processor and memory protection against hardware and software attacks, as well as architectural resilience.

Lightweight cryptographic solutions have been evaluated, and vulnerabilities in post-quantum cryptoprocessors—such as CRYSTALS-Kyber—have been revealed through electromagnetic analysis. Memory security is approached through performance counter analysis and machine learning to detect cache-based attacks, including ROP and Rowhammer, with the development of adaptive countermeasures.

In Edge Computing, a new blockchain-inspired protocol, Wallance, has been developed, offering significantly reduced memory footprint, latency, and energy consumption. Contributions also include the reliability of reconfigurable DC microgrids for renewable energy integration.

The robustness of emerging memory technologies, particularly MRAM, is explored through innovative structures for random number generation and physically unclonable functions (PUFs), developed in collaboration with CROCUS. The impact of radiation and Rowhammer attacks on MRAM is also studied, with prospects for fault-tolerant solutions.

Topic 3. Towards Eco-Responsible Computing Systems

This research theme aims to reduce the energy impact of computing systems, in response to the growing consumption driven by AI, particularly generative models. The team explores frugal solutions, from architectural optimization to large-scale infrastructures.

Work focuses on IoT sensor nodes, integrating MRAM into intermittent computing architectures, evaluated through prototyping platforms. ARM and RISC-V-based architectures have been developed to optimize memory according to application needs, demonstrating significant energy efficiency gains.

The integration of BNN accelerators and in-memory computing is being explored within PEPR projects. A flexible MAC unit has been designed for microcontrollers, offering improvements in energy consumption and chip area. GANs are used to generate optimized NoC topologies.

The GENESIS project proposes low-impact data centers with dynamic green energy management. A prototype has been deployed at Polytech Montpellier, showing promising results. The societal dimension explores environmental impact and public acceptance, in collaboration with urban planning researchers.

The Emergences project under PEPR IA investigates physics-inspired AI models such as EBM, with the development of analog circuits capable of embedded learning. A test chip is planned for 2025, with prospects for autonomous incremental learning.

PEPR Electronique 

  • projet EMCOM : Electronics for computing
  • projet CHOOSE : Cross-functional concerted action (Design)

PEPR IA

PEPR Cybersécurité Arsène

ANR SCREAM : MRAMSecure Processor with MRAM Technology

  • PRC
  • ANR – AAPG2024 – CE39 – Global security, resilience and crisis management, cybersecurity

ANR SCAMA : Secure-by-Design Computing Against Microarchitectural Attacks 

  • PRC
  • ANR – AAPG2023 – CE39 –  Sécurité globale, résilience et gestion de crise, cybersécurité

IMEC Contract. Heterogeneous memory systems with emerging  non-volatile technologies

AXIAUM Contract

EXPLAINER Contract

The influence of ADAC team members can be characterized with the following outreach activities over the 2013-2016 period:

Evaluation / Expertise

Membership: ANR Evaluation Committee for Micro and Nanotechnology Challenges

  • Membership: ANR Scientific Committee for Nanoscience and Communication Science
  • Active participation in several prospective workgroups
  • The Croucher Foundation – independent private foundation dedicated to research, Hong-Kong

Public Relations and Scientific Events

  • Organizing the BRAFITEC 2016 (Franco-Brasilian) Colloquium
  • Creating the RECOSOC Workshop RECOSOC, organizing the 2011 et 2014 editions
  • Steering Committee Memberships: IEEE FPL, RECOSOC, IEEE ISVLSI, CRYPTARCHI, IEEE NVMSA,
  • Working Group IFIP 10: Design and Engineering of Electronic Systems
  • Associate Editor : IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
  • Program Committee Memberships for main Adaptive Computing Conferences
  • IMEC, Interuniversity Microelectronics Centre, Belgium
  • Brême University, Germany
  • ETH Zurich, Swiss Federal Institute of Technology in Zurich, Suisse
  • Université Osaka
  • KIT

curlGET failed: Failed to connect to siadum.net.lirmm port 8009 after 0 ms: Could not connect to server

We are always looking for highly qualified and motivated students and researchers. Feel free to apply.