DALI Team
Digits, Architectures and Software
The DALI team is developing a unified research theme to improve the numerical quality and high performance of calculations. DALI allows the interaction, rare in France within the same team, of experts in micro-architecture and computer arithmetic.
On the performance side, our work focuses on exploiting the ever-increasing computational potential of processors: path widening (vector micro-architecture), multiplication of cores (task parallelism), increased instruction parallelism. On the arithmetic side, the numerical quality of scientific computing applications and the operating safety of embedded applications depend crucially on the mastery of finite precision and floating-point arithmetic in particular. It is a question of controlling and certifying calculations (algorithms, codes) but also of optimising the precision of results. Many software applications, both scientific and embedded, need to improve numerical quality without sacrificing speed of execution. Thus, performance improvement and numerical quality come together.
Staff
Guillaume Revy, Maître de conférences, UPVD
David Parello, Maître de conférences, UPVD
Sylvia Munoz, Technicien, UPVD
Philippe Langlois, Professeur des universités, UPVD
Christophe Negre, Maître de conférences, UPVD
Vincent Zucca, Maître de conférences, UPVD
Associates and Students
Youssef Fakhreddine, UPVD
Kenelm Louetsi, UPVD
Regular Co-workers
Nadia Tahri Roe, CDD Ingénieur-Technicien, UPVD
Bernard Goossens, Invité longue durée Eméritat, UPVD
The thematic coherence of the research work on improving the quality and performance of computations is one of the strengths of the DALI team.
The improvement of computational performance is closely linked to the improvements made to the micro-architectures. This is achieved in several directions, by widening paths (vector micro-architecture), multiplying cores (task parallelism), or increasing instruction parallelism (ILP). The numerical quality of scientific computing applications or the operating safety of critical embedded applications depend crucially on controlling the effects of finite precision calculations – and floating-point arithmetic in particular. It is therefore a question of controlling and validating calculations (algorithms, codes) but also of improving and optimising the precision of calculations and results.
The work developed over the period 2008-2013 is organised around 4 research actions:
Action 1: Reproducible measurement and analysis of parallelism potential and performance.
Action 2: Better exploitation of new multicore architectures.
Action 3: Secure and efficient implementation of cryptographic protocols.
Action 4. Code synthesis for the implementation of accurate, fast and certified calculations.
Industrial partners : Actility, Airbus, Inpixal, Prover, Rockwell-Collins, Thales, Total.
Collaborative projects: ANR Blanc EvaFlo (2006-2010), DPAC MASSANE Project (2007-2010), ANR ARPEGE (2009-2011), FNRAE SARDANES Project (2009-2012), “Chercheur d’avenir Compil’HD” Project (2010-2012), ANR INS DEFIS (2011-2014), ANR INS CAFEIN (2012-2015), PEPS QUARENUM (2013).
National collaborations : CEA-LIST, ENSTA, EXASCALE, IRISA, LIENS, LIP, LIP6, LRI, LSIS, ONERA.
International collaborations: Universitat de Girona, Technical University Hamburg, University of Malaysia Sabah, Mississippi State University, Microsoft Research Redmond, Rice University, Tokyo WCU, University of Waterloo (Canada), University of Wollongong, University of Waseda.
Title: Fonctions élémentaires : vers des implémentations automatiquement générées, efficaces et vectorisables
PhD defendant: Hugues De Lassus Saint-Geniès
Defense date: 2018-05-17
Thesis directors:
David Defour,
Guillaume Revy
Title: Contribution à la parallélisation automatique : un modèle de processeur à beaucoup de curs parallélisant.
PhD defendant: Katarzyna Porada
Defense date: 2017-11-02
Thesis directors:
Gilles Sassatelli,
Bernard Goossens