SmartIES: Smart Integrated Electronic Systems

L’équipe SmartIES est une équipe d’une trentaine de chercheurs dont les activités sont centrées sur les méthodes de conception et la modélisation de dispositifs, systèmes et circuits intégrés conçus :

• en technologie CMOS,

• à l’aide de technologies émergentes (CNT, CNTFET, MRAM, …),

• selon des approches de conception alternatives (3D, adiabatique, …)

L’ensemble de ces travaux visent à développer des systèmes et circuits intégrés offrant de hautes performances et une consommation d’énergie réduite, mais également des circuits conscients d’eux même et de leur environnement et donc capables de s’adapter à celui-ci de sorte à garantir la fonctionnalité, la sureté de fonctionnement, la sécurité et le meilleur compromis performance consommation ou bien à satisfaire d’autres contraintes applicatives spécifiques. Dans cette démarche SmartIES se caractérise par sa volonté de conduire les approches théoriques jusqu’à des démonstrateurs expérimentaux ou des bancs de mesure. Au cours de la période, on peut noter de nombreux travaux ayant contribué à des réalisations matérielles (ASIC, plateformes expérimentales dédiées, prototypes matériels et/ou logiciels).

Activités Scientifiques

Depuis 1972, la microélectronique a été portée par l'évolution rapide de la technologie CMOS. Toutefois, depuis l’entrée en production de la technologie 90nm, cette évolution s'essouffle et nombreux sont ceux qui voient la technologie 7nm comme une barrière infranchissable. Des communiqués de presse annoncent la fin de la loi de Moore pour 2021. De son côté, l'ITRS2.0 voit l'avenir de l'électronique dans l'intégration 3D et le refroidissement des puces. Dans ce contexte, les activités de recherche de l'équipe SmartIES s'articulent autour de trois axes principaux :

  1. Conception de circuits et systèmes en technologies avancées ou émergentes
  2. Conception de circuits et systèmes communicants et conscients de leur environnement
  3. Sécurité matérielle : composants sécurisés et ondes électromagnétiques

Publications depuis 2013 - Evaluation 2019

Articles de revues internationales

2018

  1. Atomistic to Circuit-Level Modeling of Doped SWCNT for On-Chip Interconnects
    Jie Liang, Jaehyun Lee, Salim Berrada, Vihar Georgiev, Reetu Raj Pandey, Rongmei Chen, Asen Asenov, Aida Todri-Sanial
    IEEE Transactions on Nanotechnology, Institute of Electrical and Electronics Engineers, In press. <10.1109/TNANO.2018.2802320>

2017

  1. Electromagnetic fault injection: the curse of flip-flops
    Sébastien Ordas, Ludovic Guillaume-Sage, Philippe Maurine
    Journal of Cryptographic Engineering, Springer, 2017, 7 (3), pp.183-197.
  2. Smart-MEMS based inertial measurement units: gyro-free approach to improve the grade
    Gaurav Chatterjee, Laurent Latorre, Frédérick Mailly, Pascal Nouet, Nacim Hachelef, Coumar Oudea
    Microsystem Technologies, Springer Verlag, 2017, 23 (9), pp.3969-3978.
  3. A fully-digital and ultra-low-power front-end for differential capacitive sensors
    Patcharee Kongpark, Souha Hacine, Laurent Latorre, Frédérick Mailly, Pascal Nouet
    Microsystem Technologies, Springer Verlag, 2017, 23 (9), pp.3991-4000.
  4. Efficient Objective Metric Tool for Medical Electrical Device Development: Eye Phantom for Glaucoma Diagnosis Device
    Anthony Deluthault, Luc Mezenge, Philippe Cauvet, Vincent Kerzérho, Fabien Soulier, Serge Bernard
    Journal of Sensors, Hindawi Publishing Corporation, 2017, 2017, pp.1687-725X.
  5. A Survey of Carbon Nanotube Interconnects for Energy Efficient Integrated Circuits
    Aida Todri-Sanial, Raphael Ramos, Hanako Okuno, Jean Dijon, Abitha Dhavamani, Marcus Widlicenus, Katharina Lilienthal, Benjamin Uhlig, Toufik Sadi, Vihar Georgiev, Asen Asenov, Salvatore Amoroso, Andrew Pender, Andrew Brown, Campbell Millar, Fabian Motzfeld, Bernd Gotsmann, Jie Liang, Goncalo Goncalves, Nalin Rupesinghe, Ken Teo
    IEEE Circuits and Systems Magazine -New Series-, Institute of Electrical and Electronics Engineers, 2017, 17 (2), pp.47-62.
  6. 2018

    1. A Temperature-Hardened Sensor Interface with a 12-Bit Digital Output Using a Novel Pulse Width Modulation Technique
      Emna Chabchoub, Franck Badets, Frédérick Mailly, Pascal Nouet, Mohamed Masmoudi
      Sensors, MDPI, 2018, 18 (4), pp.1107-1227.
    2. On-chip Generation of Sine-wave Summing Digital Signals: an Analytic Study Considering Implementation Constraints
      Stéphane David-Grignot, Achraf Lamlih, Mohamed Moez Belhaj, Vincent Kerzérho, Florence Azaïs, Fabien Soulier, Philippe Freitas, Tristan Rouyer, Sylvain Bonhommeau, Serge Bernard
      Journal of Electronic Testing, Springer Verlag, 2018. <10.1007/s10836-018-5710-4>
    3. From theory to practice: horizontal attacks on protected implementations of modular exponentiations
      Ibrahima Diop, Yanis Linge, Thomas Ordas, Pierre-Yvan Liardet, Philippe Maurine
      Journal of Cryptographic Engineering, Springer, In press. <10.1007/s13389-018-0181-1>

    2017

    1. An On-Chip Technique to Detect Hardware Trojans and Assist Counterfeit Identification
      Maxime Lecomte, Jacques Fournier, Philippe Maurine
      IEEE Transactions on Very Large Scale Integration (VLSI) Systems, IEEE, 2017, 25 (12), pp.3317-3330.
    2. Method for evaluation of transient-fault detection techniques
      Raphael Andreoni Camponogara-Viera, Rodrigo Possamai Bastos, Jean-Max Dutertre, Philippe Maurine, Rodrigo Iga Jadue
      Microelectronics Reliability, Elsevier, 2017, 76-77, pp.68-74.
    3. Guest Editorial Special Issue on Nanoelectronic Circuit and System Design Methods for the Mobile Computing Era
      Aida Todri-Sanial, Saraju Mohanty, Mariane Comte, Marc Belleville
      ACM Journal on Emerging Technologies in Computing Systems, Association for Computing Machinery, 2017, 13 (2), pp.1-2.

Communications internationales

2018

  1. Standard CAD Tool-Based Method for Simulation of Laser-Induced Faults in Large-Scale Circuits
    Raphael Andreoni Camponogara-Viera, Jean-Max Dutertre, Philippe Maurine, Rodrigo Possamai Bastos
    ISPD: International Symposium on Physical Design, Mar 2018, Monterey, CA, United States. ACM Press, International Symposium on Physical Design, pp.160-167, 2018.

2017

  1. A physics-based investigation of Pt-salt doped carbon nanotubes for local interconnects
    Jie Liang, Raphael Ramos, Jean Dijon, H. Okuno, D. Kalita, D. Renaud, J. Lee, Vihar Georgiev, Salim Berrada, T. Sadi, A. Asenov, B. Uhlig, K. Lilienthal, A. Dhavamani, F. Konemann, B. Gotsmann, G. Goncalves, B. Chen, K. Teo, Reetu Pandey, Aida Todri-Sanial
    IEDM: International Electron Devices Meeting, Dec 2017, San Francisco, United States. IEEE, IEEE International Electron Devices Meeting, 2018. <10.1109/IEDM.2017.8268502>
  2. Synchronised 4-Phase Resonant Power Clock Supply for Energy Efficient Adiabatic Logic
    Nicolas Jeanniot, Gael Pillonnet, Pascal Nouet, Nadine Azemard, Aida Todri-Sanial
    ICRC: International Conference on Rebooting Computing, Nov 2017, Washington, DC, United States. IEEE, IEEE International Conference on Rebooting Computing, 2017. <10.1109/ICRC.2017.8123661>
  3. Method for evaluation of transient-fault detection techniques
    Raphael Andreoni Camponogara-Viera, Rodrigo Possamai Bastos, Jean-Max Dutertre, Philippe Maurine
    ESREF: European Symposium on Reliability of Electron devices, Failure physics and analysis, Sep 2017, Bordeaux, France. 2017.
  4. The impact of vacancy defects on CNT interconnects: From statistical atomistic study to circuit simulations
    Jaehyun Lee, Salim Berrada, Jie Liang, Toufik Sadi, Vihar Georgiev, Aida Todri-Sanial, Dipankar Kalita, Raphaël Ramos, Hanako Okuno, Jean Dijon, Asen Asenov
    SISPAD: International Conference on Simulation of Semiconductor Processes and Devices, Sep 2017, Kamakura, Japan. IEEE, International Conference on Simulation of Semiconductor Processes and Devices, 2017. <10.23919/SISPAD.2017.8085288>
  5. Atoms-to-circuits simulation investigation of CNT interconnects for next generation CMOS technology
    Jaehyun Lee, Jie Liang, Salvatore Amoroso, Toufik Sadi, Liping Wang, Asen Asenov, Andrew Pender, Dave Reid, Vihar Georgiev, Campbell Millar, Aida Todri-Sanial
    SISPAD: Simulation of Semiconductor Processes and Devices, Sep 2017, Kamakura, Japan. IEEE, International Conference on Simulation of Semiconductor Processes and Devices, 2017. <10.23919/SISPAD.2017.8085287>
  6. Role of Laser-Induced IR Drops in the Occurrence of Faults: Assessment and Simulation
    Raphael Andreoni Camponogara-Viera, Jean-Max Dutertre, Rodrigo Possamai Bastos, Philippe Maurine
    DSD: Digital System Design, Aug 2017, Vienna, Austria. IEEE, Euromicro Conference on Digital System Design, 2017. <10.1109/DSD.2017.43>
  7. High Temperature, Time Domain Sensor Interface based on Phase Shifter
    Emna Chabchoub, Franck Badets, Mohamed Masmoudi, Pascal Nouet, Frédérick Mailly
    HiTen: High Temperature Electronics Network, Jul 2017, Cambridge, United Kingdom. International Conference and Exhibition on High Temperature Electronics Network, 2017 (HiTen), pp.103-108, 2017.
  8. GREAT: HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional Standardized sTack
    Mehdi Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Sophiane Senni, Jad Mohdad, Frédérick Mailly, Lionel Torres, Pascal Benoit, Pascal Nouet, Rui Ma, Martin Kreißig, Frank Ellinger, Kotb Jabeur, Pierre Vanhauwaert, Gregory Di Pendina, Guillaume Prenat
    ISVLSI: International Symposium on Very Large Scale Integration, Jul 2017, Bochum, Germany. IEEE International Symposium on Very Large Scale Integration, 2017. <10.1109/ISVLSI.2017.67>
  9. Analytical Study of On-chip Generations of Analog Sine-wave Based on Combined Digital Signals
    Stéphane David-Grignot, Achraf Lamlih, Vincent Kerzérho, Florence Azaïs, Fabien Soulier, Serge Bernard
    IMSTW: International Mixed Signals Testing Workshop, Jul 2017, Thessaloniki, Greece. IEEE, 22nd IEEE International Mixed Signals Testing Workshop, 2017. <10.1109/IMS3TW.2017.7995205>
  10. New time-domain conditioning circuit for resistive sensor: Behavioral modelling for simulation and optimization
    Emna Chabchoub, Franck Badets, Mohamed Masmoudi, Frédérick Mailly, Pascal Nouet
    MIXDES: Mixed Design of Integrated Circuits and Systems, Jun 2017, Bydgoszcz, Poland. IEEE, 24th International Conference on Mixed Design of Integrated Circuits and Systems, pp.408-411, 2017.
  11. Importance of IR Drops on the Modeling of Laser-Induced Transient Faults
    Raphael Andreoni Camponogara-Viera, Philippe Maurine, Jean-Max Dutertre, Rodrigo Possamai Bastos
    SMACD: Synthesis, Modeling, Analysis and simulation methods and applications to Circuit Design, Jun 2017, Giardini Naxos, Taormina, Italy. IEEE, 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, 2017. <10.1109/SMACD.2017.7981593>
  12. A hierarchical model for CNT and Cu-CNT composite interconnects: from density functional theory to circuit-level simulations
    Lee Jaehyun, Sadi Toufik, Liang Jie, Vihar Georgiev, Aida Todri-Sanial, Asenov Asen
    IWCN: International Workshop on Computational Nanotechnology, Jun 2017, Windermere, United Kingdom. 19th IEEE International Workshop on Computational Nanotechnology, 2017. <http://iwcn2017.iopconfs.org/>
  13. Toward Carbon Nanotube Computing
    Aida Todri-Sanial
    Emerging Technology, May 2017, Varsovie, Poland. CMOS Emerging Technology Research Symposium, 2017. <http://www.etcmos.com/current_event.php?event=2017>
  14. Formal analysis of high-performance stabilized active-input current mirror
    Mohan Julien, Serge Bernard, Fabien Soulier, Vincent Kerzérho, Guy Cathébras
    ISCAS: International Symposium on Circuits and Systems, May 2017, Baltimore, MD, United States. IEEE, IEEE International Symposium on Circuits and Systems, 2017. <10.1109/ISCAS.2017.8051012>
  15. A high temperature, 12-bit-time-domain sensor interface based on injection locked oscillator
    Emna Chabchoub, Franck Badets, Pascal Nouet, Mohamed Masmoudi, Frédérick Mailly
    ISCAS: International Symposium on Circuits and Systems, May 2017, Baltimore, United States. IEEE, 50th IEEE International Symposium of Circuits and Systems., pp.1-4, 2017.
  16. Electrical performance of carbon-based power distribution networks with thermal effects
    A. Magnani, M. De Magistris, S. Heidari, Aida Todri-Sanial, A. Maffucci
    SPI: Signal and Power Integrity, May 2017, Baveno, Italy. IEEE, IEEE 21st Workshop on Signal and Power Integrity, 2017. <10.1109/SaPIW.2017.7944044>
  17. Combo of innovative educational approaches to teach industrial test to undergraduate students
    Beatrice Pradarelli, Pascal Nouet, Laurent Latorre
    EDUCON: Global Engineering Education Conference, Apr 2017, Athens, Greece. IEEE, 8th IEEE Global Engineering Education Conference, 2017. <10.1109/EDUCON.2017.7942824>
  18. Impacts of Technology Trends on Physical Attacks?
    Philippe Maurine, Sylvain Guilley
    COSADE: Constructive Side-Channel Analysis and Secure Design, Apr 2017, Paris, France. International Workshop on Constructive Side-Channel Analysis and Secure Design, LNCS (10348), pp.190-206, 2017.
  19. Formal analysis of bandwidth enhancement for high-performance active-input current mirror
    Mohan Julien, Serge Bernard, Fabien Soulier, Vincent Kerzérho, Guy Cathébras
    DTIS: Design and Technology of Integrated Systems in Nanoscale Era, Apr 2017, Palma de Mallorca, Spain. IEEE, 12th International Conference on Design & Technology of Integrated Systems In Nanoscale Era, 2017. <10.1109/DTIS.2017.7930162>
  20. Highly linear voltage-to-time converter based on injection locked relaxation oscillators
    Emna Chabchoub, Franck Badets, Mohamed Masmoudi, Pascal Nouet, Frédérick Mailly
    SSD: Systems, Signals and Devices, Mar 2017, Marrakech, Morocco. IEEE, 14th International Multi-Conference on Systems, Signals and Devices, 2017, SAC: Systems, Analysis and Automatic. <10.1109/SSD.2017.8167011>
  21. Power and Performance Analysis of Doped SW/DW CNT for On-Chip Interconnect Application
    Aida Todri-Sanial, Jie Liang
    GRAPHENE, Mar 2017, Barcelone, Spain. 7th edition of the largest European Conference in Graphene and 2D Materials, 2017. <http://www.grapheneconf.com/2017/>

2014

  1. Power supply noise-aware workload assignments for homogeneous 3D MPSoCs with thermal consideration
    Yuanqing Cheng, Aida Todri-Sanial, Alberto Bosio, Luigi Dilillo, Patrick Girard, Arnaud Virazel
    ASP-DAC: Asia and South Pacific Design Automation Conference, Jan 2014, Singapore, Singapore. 19th Asia and South Pacific Design Automation Conference, 2014. <10.1109/ASPDAC.2014.6742948>

Membres

Permanents

Non permanents

Mots-clés

Conception de circuits intégrés, analogiques, mixtes, numériques, CMOS, technologie émergentes, MEMS, modélisation physique, conception statistique, monitoring du vivant, sécurité des composants.

Dernière mise à jour le 29/03/2018

Département : Microélectronique

Responsable : Philippe MAURINE