Design Continuum for Next Generation Energy‐Efficient Compute Nodes
About the project
CONTINUUM is a project addressing the design of next generation energy-efficient high-performance embedded compute nodes. It focuses at the same time on software, architecture and emerging memory and communication technologies in order to synergistically exploit their corresponding features. It is organized around three topics:
Tailored compilation techniques
CONTINUUM studies how programs can adequately exploit the specific features of investigated compute node, i.e. its adaptive heterogeneous computation paradigm and novel memory and communication technologies. It proposes to build upon both static and dynamic compilation techniques to explore how applications perform on different configurations. The Inria and Cortus partners of CONTINUUM have a solid background for a successful achievement of the project goal.
Heterogeneous adaptive multicore
CONTINUUM aims at the design of a compute node based on state-of-the-art heterogeneous adaptive embedded multicore systems. Such a compute node adheres to recent technologies mixing energy-demanding powerful “big” cores and low power “small” cores, e.g. ARM big.LITTLE. The design of the foreseen compute node architecture will rely on the recognized expertise of Cortus partner in low power core design, and on the experience of LIRMM partner in the field of multicore adaptive architectures.
Another aim of CONTINUUM is to explore the integration of emerging technologies in hardware architectures for efficient data management. Non-volatile memories with desirable features will be combined with volatile memory technologies. The inter-core communications will be preferably achieved via Network-on-Chip (NoCs), which will be explored in order to aggressively reduce communication cost. The LIRMM partner of CONTINUUM has a solid background in emerging technologies.